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Commit 13d56ae4 authored by Peter Jansweijer's avatar Peter Jansweijer
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decoupled from platform_xilinx in preparation for GM sync PPS

parent 0e0ee43b
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hdl/spec7_ref_design/sim/VCom_spec7_wr_ref_top_Functional.tcl
View file @ 13d56ae4
......@@ -38,8 +38,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrc_diags_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrc_syscon_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/gtx_comma_detect_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/whiterabbit_gtxe2_channel_wrapper_gt_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/whiterabbit_gtxe2_channel_wrapper_gt.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/gtp_bitslide.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_hdr_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/axi/axi4_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/common/gc_crc_gen.vhd
......@@ -90,7 +88,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/fixed_latency_
vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/xwrc_diags_wb.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/wr_gtx_phy_family7.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_slave_fsm.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_narrow.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_widen.vhd
......@@ -134,7 +131,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_packet_in
vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_pcs_16bit.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_pcs_8bit.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/streamers_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/xwrc_platform_xilinx.vhd
vcom -explicit -93 -work work ../../wr-cores/board/common/wr_board_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/common/inferred_sync_fifo.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd
......
hdl/spec7_ref_design/syn/proj_file_list.txt
View file @ 13d56ae4
......@@ -37,8 +37,6 @@
../../wr-cores/modules/wrc_core/wrc_syscon_pkg.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/gtx_comma_detect_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/whiterabbit_gtxe2_channel_wrapper_gt_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/whiterabbit_gtxe2_channel_wrapper_gt.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/gtp_bitslide.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_hdr_pkg.vhd
../../wr-cores/ip_cores/general-cores/modules/axi/axi4_pkg.vhd
../../wr-cores/ip_cores/general-cores/modules/common/gc_crc_gen.vhd
......@@ -89,7 +87,6 @@
../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
../../wr-cores/modules/wrc_core/xwrc_diags_wb.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/wr_gtx_phy_family7.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_slave_fsm.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_narrow.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_widen.vhd
......@@ -133,7 +130,6 @@
../../wr-cores/modules/wr_endpoint/ep_tx_pcs_16bit.vhd
../../wr-cores/modules/wr_endpoint/ep_tx_pcs_8bit.vhd
../../wr-cores/modules/wr_streamers/streamers_pkg.vhd
../../wr-cores/platform/xilinx/xwrc_platform_xilinx.vhd
../../wr-cores/board/common/wr_board_pkg.vhd
../../wr-cores/ip_cores/general-cores/modules/genrams/common/inferred_sync_fifo.vhd
../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd
......
hdl/spec7_write_design/sim/VCom_spec7_write_top_Functional.tcl
View file @ 13d56ae4
......@@ -39,8 +39,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrc_diags_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/wrc_syscon_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/gtx_comma_detect_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/whiterabbit_gtxe2_channel_wrapper_gt_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/whiterabbit_gtxe2_channel_wrapper_gt.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/gtp_bitslide.vhd
vcom -explicit -93 -work work ../../wr-cores/top/spec7_write_design/pll_62m5_500m.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_hdr_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/axi/axi4_pkg.vhd
......@@ -92,7 +90,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/fixed_latency_
vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wrc_core/xwrc_diags_wb.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/wr_gtx_phy_family7.vhd
vcom -explicit -93 -work work ../../wr-cores/top/spec7_write_design/gen_10mhz.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_slave_fsm.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_narrow.vhd
......@@ -137,7 +134,6 @@ vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_packet_in
vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_pcs_16bit.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_endpoint/ep_tx_pcs_8bit.vhd
vcom -explicit -93 -work work ../../wr-cores/modules/wr_streamers/streamers_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/platform/xilinx/xwrc_platform_xilinx.vhd
vcom -explicit -93 -work work ../../wr-cores/board/common/wr_board_pkg.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/common/inferred_sync_fifo.vhd
vcom -explicit -93 -work work ../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd
......
hdl/spec7_write_design/syn/proj_file_list.txt
View file @ 13d56ae4
......@@ -37,8 +37,6 @@
../../wr-cores/modules/wrc_core/wrc_syscon_pkg.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/gtx_comma_detect_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/whiterabbit_gtxe2_channel_wrapper_gt_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/whiterabbit_gtxe2_channel_wrapper_gt.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/gtp_bitslide.vhd
../../wr-cores/top/spec7_write_design/pll_62m5_500m.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_hdr_pkg.vhd
../../wr-cores/ip_cores/general-cores/modules/axi/axi4_pkg.vhd
......@@ -90,7 +88,6 @@
../../wr-cores/modules/wr_streamers/ts_restore_tai.vhd
../../wr-cores/modules/wrc_core/xwrc_diags_wb.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx-lp/wr_gtx_phy_family7_lp.vhd
../../wr-cores/platform/xilinx/wr_gtp_phy/family7-gtx/wr_gtx_phy_family7.vhd
../../wr-cores/top/spec7_write_design/gen_10mhz.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_slave_fsm.vhd
../../wr-cores/ip_cores/etherbone-core/hdl/eb_slave_core/eb_stream_narrow.vhd
......@@ -135,7 +132,6 @@
../../wr-cores/modules/wr_endpoint/ep_tx_pcs_16bit.vhd
../../wr-cores/modules/wr_endpoint/ep_tx_pcs_8bit.vhd
../../wr-cores/modules/wr_streamers/streamers_pkg.vhd
../../wr-cores/platform/xilinx/xwrc_platform_xilinx.vhd
../../wr-cores/board/common/wr_board_pkg.vhd
../../wr-cores/ip_cores/general-cores/modules/genrams/common/inferred_sync_fifo.vhd
../../wr-cores/ip_cores/general-cores/modules/genrams/xilinx/generic_simple_dpram.vhd
......
wr-cores @ 0d9c9fae
Subproject commit 54f835c0a142ca2c255b98bf27adb72c309d0d59
Subproject commit 0d9c9faed5f8e586c16db6f86cd2353d9933ba20
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