Testing the board
This page is dedicated to the experimental setup to test the TDC. This setup is represented on figure 1.
Figure 1 - Picture of the experimental setup
To ease the comprehension, this setup is schematised in figure 2.
Figure 2 - Schematics of the experimental setup
Pulses are sent from a function generator. These pulses have a square form, 5 ns of rising edge. Their minimum value is 0 V and their maximum value is 5 V. Their frequency is set to 1.5 Hz with a duty cycle of 50 %.
These pulses are sent in a Minicircuit HF splitter (ZFSC-2-2500). The splitter outputs are connected to the TDC by cables. One analogue delay line is inserted in the path of one channel. This line allows us to change the global length of one channel by small increments.
The pulses are then sent in a filter described in the filter-section before entering the ADC board.