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Multi-channel Time Interval Counter and fine delay generator
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Board features

Last edited by OHWR Gitlab support Mar 27, 2019
Page history

Board features

The connections


Figure 1 - Card features

Features

Parameter Value
Max. Sampling rate 125 MSPS
Bits/sample 14 bit
ENOB (THD omitted) 12.2 bit
ENOB at 15 MHz 11.4 bit
Channels 4
Connectors SMA @ 50 ohm
Input Range +/- 1 V
Miscellaneous GPIO connectors, temperature sensor, clock synchronized output
Clock source Internal: 100 MHz oscillator
External: up to 125 MHz with an external clock

Inputs

Input Connector Max Voltage
Ground referenced analog signal SMA 2 Vpp
Differential analog signal SMA 2 V
Clock Input signal SMA 2 Vpp
MicroZed Board GPIO Pin headers 3.3 V
Buck switching frequency input SMA 5.5 V
12 V power supply Barrel DC jack & MINI DIN 4 16 V DC

Measured ENOB

The measured ENOB (THD omitted) is 12.2 bit with a sampling frequency of 100 MHz (on board oscillator). This measurement has been done using the same method as for the FMC ADC 100M

It has also been measured at 15 MHz. The result is 11.4 bit. It was necessary to filter the output of the R&S oscillator to get these results.

Power requirements

This board is designed to work with a 12 V DC at 3 A max.

Using the local oscillator

By default, the board is mounted to be able to use an external oscillator (connector J13, 50 Ohm). To use the local oscillator, the ferrite bead L14 has to be mounted. The resistor R42 has to be removed and replaced by R33. The clock splitter LT6957 can also be used as a filter. Its cutting frequency can be set by the jumpers J15 and J16 (table 1), by default (without the jumpers), the bandwidth is set to 1200 MHz. The low position of the jumper is indicated by the 1 on the silkscreen. For example, if we want a bandwidth of 160 MHz, the jumper on J15 has to be placed linking the pin3 and the pin2 and J16 with the jumper linking the pin2 and pin1.

J15 J16 Bandwidth
LOW LOW 1200 MHz (Full Bandwidth)
LOW HIGH 500 MHz (-3 dB)
HIGH LOW 160 MHz (-3 dB)
HIGH HIGH 50 MHz (-3 dB)

Table 1 - LT6957 bandwith according to the jumper position

Changing the buck converter switching frequency

It is possible to change the LM43603 switching frequency. On one hand, it is possible to change it by replacing the R19 resistor (Table 2). By default, this frequency is set to around 1 MHz by the use of a 39k resistor. The Table 2 is used as information, any resistor value in between two values of the table will give a switching frequency in between the corresponding frequencies. If no resistor is connected, the switching frequency is 500 kHz.

On the other hand, it is possible to use an external oscillator to set this switching frequency. The clock signal is given on the J14 connector (50 Ohm). It is recommended to connect a resistor R19 such that the internal oscillator frequency is the same as the external one. More information on the LM43603 datasheet.

Fs [kHz] R19 [kOhm]
200 200
350 115
500 78.7
750 53.6
1000 39.2
1500 26.1
2000 19.6
2200 17.8

Table 2 - LM43603 switching frequency according to the R19 resistor

Board GPIO connectors

Some GPIO pins are provided to be able to use the board for other purposes. While turning the card as on the above picture (Figure 1), the pin 1 for each connector is the one on the bottom left. Pin 2 is directly to its right etc. The pin 7 is placed above the pin1, next to it is the pin 8 etc. The table Table 3 shows the used GPIO.

ADC board connection MicroHeader Connection Zynq AP SoC Connection
P2 pin 1 pin 73 Bank 35 K14
P2 pin 2 pin 75 Bank 35 J14
P2 pin 3 pin 74 Bank 35 H15
P2 pin 4 pin 76 Bank 35 G15
P2 pin 7 pin 81 Bank 35 N15
P2 pin 8 pin 83 Bank 35 N16
P2 pin 9 pin 82 Bank 35 L14
P2 pin 10 pin 84 Bank 35 L15
P3 pin 1 pin 62 Bank 35 F19
P3 pin 2 pin 64 Bank 35 F20
P3 pin 3 pin 61 Bank 35 G17
P3 pin 4 pin 63 Bank 35 G18
P3 pin 7 pin 53 Bank 35 H16
P3 pin 8 pin 55 Bank 35 H17
P3 pin 9 pin 54 Bank 35 J18
P3 pin 10 pin 56 Bank 35 H18
P4 pin 1 pin 36 Bank 35 M19
P4 pin 2 pin 38 Bank 35 M20
P4 pin 3 pin 41 Bank 35 M17
P4 pin 4 pin 43 Bank 35 M18
P4 pin 7 pin 35 Bank 35 L19
P4 pin 8 pin 37 Bank 35 L20
P4 pin 9 pin 42 Bank 35 K19
P4 pin 10 pin 44 Bank 35 J19
P5 pin 1 pin 23 Bank 35 E17
P5 pin 2 pin 25 Bank 35 D18
P5 pin 3 pin 24 Bank 35 D19
P5 pin 4 pin 26 Bank 35 D20
P5 pin 7 pin 29 Bank 35 E18
P5 pin 8 pin 31 Bank 35 E19
P5 pin 9 pin 30 Bank 35 F16
P5 pin 10 pin 32 Bank 35 F17

Table 3 - GPIO connections to the Zynq


05th of December 2016 - Nicolas Boucquey

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  • Board features
  • Delay measurements
  • Delay measurements for sampled signals
  • Design review 21062016
  • Design and layout review 15042016
  • Design and layout review 30082016
  • Detailed status
  • Documents
  • Documents
    • Adc board gerber files
    • Adc board design pdf 15 04 2016 old version
    • Adc board design pdf 21 06 2016
    • Adc board design pdf after revision
    • Boucquey master thesis
    • Cmos gate schematics
    • Filter board gerber files
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