Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it>

If not allowed to fail, then the CI pipeline is marked as "blocked" and never finished properly
until we run the sims.

This reverts commit f381793c.

Because GCC11 is not ready yet, we decided to stick with GCC7 for now.

To avoid having any leftovers in the uart buffer after reset

This is a partial revert of fdc2c469, where the strobe signal was also
used to avoid double writes/reads (because the cycle signal lasts two cycles).

In practice this introduced a bug when doing a read cycle, where the data
is lost because it becomes available after the strobe is deasserted.

The solution is to stop looking at the strobe for area selection, but keep it
for defining the read/write cycle.

Mainly this patch adds debug prints, and it follows the documentation
suggestions; so, instead on mapping header and payload separately it maps
a ``struct trtl_fw_msg``.

The volatile is needed to avoid compiler warning and optimization that
would remove the assignment and the loop because of "assigned but not
used variable".
Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it>

Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it>

Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it>

Recent version of GCC changed the architecture name to
``-march=rv32im_zicsr``. With this change we support only GCC version
recognizing this option.
Signed-off-by: Federico Vaga <federico.vaga@vaga.pv.it>

The system needs time for an IRQ to happen before we are able to see a
change in the HMQ statistics. Waiting 10ms seems reasonable.

Increase also the timeout on the firmware side to 1 second. With these
tests, we are interested in the functionality and not (at least today)
to its performance.

However this test was working fine in the past. For some reason now
there a component that is slower, or faster, than before.

For sure the Python interpreter is different and it could be that is now
much faster compared to some years ago when probably we tested this with
Python 2.7.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

The CPU needs time to change state (both direction). This patch adds a
timeout logic for that change to happen. If the change does not happen
within the timeout, then the driver returns a warning on the dmesg.

At this moment in time I'm not sure if it is worthy to actually return
an error. For now, to avoid API changes, we just print a warning.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

With this flag, the full UART FIFO will be used and the 'full' flag will be properly raised.

See also the relevant comments in the general-cores module.

The '-2' was needed before because of an HDL bug which has now been fixed.

because of double declaration of the symbol

Merge remote-tracking branch 'origin/22-update-dependencies-for-the-demo' into 22-update-dependencies-for-the-demo

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>