home.md

+# Hydra - a radiation-tolerant SoC
+
+## Description
+
+Hydra is a radiation-tolerant SoC designed to operate up to 500 Gy TID. It features a RISC-V CPU running at 50 MHz, 96 kB of ROM for code, 64 kB of RAM, two Ethernet NIC with low-latency L2 packet switching, SPI and watchdog. 
+
+## Main Features
+
+- Gateware
+  - RISC-V CPU
+  - Clock speed: 50 MHz
+  - ROM for code: 96 kByte
+  - RAM: 64 kByte
+  - 2 x Ethernet NIC with low-latency L2 packet switching
+  - SPI
+  - Watchdog
+- Provided Software
+  - Linux device driver based on [ZIO](https://www.ohwr.org/project/zio) and stacked on the [SPEC](https://www.ohwr.org/project/spec/wiki) or SVEC driver
+  - User space libraries
+  - Documentation
+
+
+-----
+
+## [Releases](Releases)
+
+
+-----
+
+## Documentation
+
+
+
+-----
+
+## Contacts
+
+- [Mattia Rizzi](mailto:mattia.rizzi@cern.ch) - CERN
+
+
+## Project Status
+
+|**Date**|**Event**|
+|----|----|
+|20-05-2020|Start of project|
+
+
+-----
+
+20 May 2020
+
+