Hydra - a radiation-tolerant SoC

Description

Hydra is a radiation-tolerant SoC designed to operate up to 500 Gy TID. It features a RISC-V CPU running at 50 MHz, 96 kB of ROM for code, 64 kB of RAM, two Ethernet NIC with low-latency L2 packet switching, SPI and watchdog.

Main Features

• Gateware
  • RISC-V CPU
  • Clock speed: 50 MHz
  • ROM for code: 96 kByte
  • RAM: 64 kByte
  • 2 x Ethernet NIC with low-latency L2 packet switching
  • SPI
  • Watchdog
• Provided Software
  • Linux device driver based on ZIO and stacked on the SPEC or SVEC driver
  • User space libraries
  • Documentation

Releases

Documentation

Contacts

• Mattia Rizzi - CERN

Project Status

20 May 2020