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Hdlmake
Commit c6882f82 authored by Istvan Kiss's avatar Istvan Kiss
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[add]IP core generator file support

parent 08a49025
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Showing with 14 additions and 3 deletions
hdlmake/sourcefiles/srcfile.py
View file @ c6882f82
......@@ -235,6 +235,13 @@ class EDFFile(File):
"""EDIF Netlist Files"""
pass
class IPXFile(File):
"""This is the class providing the Lattice Diamond IP Express Manifest file"""
pass
class LPCFile(File):
"""This is the class providing the Lattice Diamond IP Customization file"""
pass
LATTICE_FILE_DICT = {
'ldf': LDFFile,
......@@ -243,7 +250,9 @@ LATTICE_FILE_DICT = {
'edif': EDFFile,
'edi': EDFFile,
'edn': EDFFile,
'pcf': PCFFile}
'pcf': PCFFile,
'ipx': IPXFile,
'lpc': LPCFile}
# MICROSEMI/ACTEL FILES
......
hdlmake/tools/diamond.py
View file @ c6882f82
......@@ -26,7 +26,7 @@
from __future__ import absolute_import
from .makefilesyn import MakefileSyn
from ..sourcefiles.srcfile import EDFFile, LPFFile, VHDLFile, VerilogFile
from ..sourcefiles.srcfile import EDFFile, LPFFile, VHDLFile, VerilogFile, IPXFile, LPCFile
class ToolDiamond(MakefileSyn):
......@@ -49,7 +49,9 @@ class ToolDiamond(MakefileSyn):
SUPPORTED_FILES = {
EDFFile: _LATTICE_SOURCE.format('add'),
LPFFile: _LATTICE_SETTINGS_DUMMY.format('add -exclude') + '; ' +
_LATTICE_SOURCE.format('enable')}
_LATTICE_SOURCE.format('enable'),
IPXFile: _LATTICE_SOURCE.format('add'),
LPCFile: _LATTICE_SOURCE.format('add')}
HDL_FILES = {
VHDLFile: _LATTICE_SOURCE.format('add'),
......
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