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Hdlmake
Commits
706e9897
Commit
706e9897
authored
Oct 04, 2019
by
Tristan Gingold
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vlog_parser: remove unused methods.
parent
9e1238ff
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vlog_parser.py
hdlmake/sourcefiles/vlog_parser.py
+0
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hdlmake/sourcefiles/vlog_parser.py
View file @
706e9897
...
...
@@ -56,15 +56,6 @@ class VerilogPreprocessor(object):
"undef"
,
"timescale"
]
class
VLDefine
(
object
):
"""Class that provides a container for Verilog Defines"""
def
__init__
(
self
,
name
,
args
,
expansion
):
self
.
name
=
name
self
.
args
=
args
self
.
expansion
=
expansion
def
__init__
(
self
):
self
.
vlog_file
=
None
# List of macro definitions
...
...
@@ -73,13 +64,6 @@ class VerilogPreprocessor(object):
self
.
vpp_filedeps
=
{}
self
.
macro_depth
=
0
def
_find_macro
(
self
,
name
):
"""Get the Verilog preprocessor macro named 'name'"""
for
macro_aux
in
self
.
vpp_macros
:
if
macro_aux
.
name
==
name
:
return
macro_aux
return
None
def
_search_include
(
self
,
filename
,
parent_dir
=
None
):
"""Look for the 'filename' Verilog include file in the
provided 'parent_dir'. If the directory is not provided, the method
...
...
@@ -97,22 +81,6 @@ class VerilogPreprocessor(object):
"directories: {}"
.
format
(
filename
,
self
.
vlog_file
.
file_path
,
', '
.
join
(
self
.
vlog_file
.
include_dirs
)))
def
_parse_macro_def
(
self
,
macro
):
"""Parse the provided 'macro' and, if it's not a reserved keyword,
create a new VLDefine instance and add it to the Verilog preprocessor
list of macros"""
name
=
macro
.
group
(
1
)
expansion
=
macro
.
group
(
3
)
if
macro
.
group
(
2
):
params
=
macro
.
group
(
2
)
.
split
(
","
)
else
:
params
=
[]
if
name
in
self
.
vpp_keywords
:
raise
Exception
(
"Attempt to `define a reserved preprocessor keyword"
)
mdef
=
self
.
VLDefine
(
name
,
params
,
expansion
)
self
.
vpp_macros
.
append
(
mdef
)
return
mdef
def
_preprocess_file
(
self
,
file_content
,
file_name
,
library
):
"""Preprocess the content of the Verilog file"""
def
_remove_comment
(
text
):
...
...
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