testsuite: add two testcases.

33b5a013 · Tristan Gingold · 2a15d4e1 · 33b5a013 · 33b5a013 · 33b5a013
Commit 33b5a013 authored Jun 06, 2019 by Tristan Gingold
6 changed files
--- a/testsuite/043local_fetch/Makefile.ref
+++ b/testsuite/043local_fetch/Makefile.ref
+########################################
+#  This file was generated by hdlmake  #
+#  http://ohwr.org/projects/hdl-make/  #
+########################################
+
+TOP_MODULE := gate
+PWD := $(shell pwd)
+
+MODELSIM_INI_PATH := ../linux_fakebin/..
+
+VCOM_FLAGS := -quiet -modelsimini modelsim.ini 
+VSIM_FLAGS := 
+VLOG_FLAGS := -quiet -modelsimini modelsim.ini 
+VMAP_FLAGS := -modelsimini modelsim.ini 
+#target for performing local simulation
+local: sim_pre_cmd simulation sim_post_cmd
+
+VERILOG_SRC := 
+VERILOG_OBJ := 
+VHDL_SRC := ../files/gate.vhdl \
+
+VHDL_OBJ := work/gate/.gate_vhdl \
+
+INCLUDE_DIRS :=
+LIBS := work
+LIB_IND := work/.work
+
+simulation: modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
+$(VERILOG_OBJ) : modelsim.ini
+$(VHDL_OBJ): $(LIB_IND) modelsim.ini
+
+modelsim.ini: $(MODELSIM_INI_PATH)/modelsim.ini
+		cp $< . 2>&1
+work/.work:
+	(vlib work && vmap $(VMAP_FLAGS) work && touch work/.work )|| rm -rf work 
+
+
+work/gate/.gate_vhdl: ../files/gate.vhdl
+		vcom $(VCOM_FLAGS) -work work $< 
+		@mkdir -p $(dir $@) && touch $@ 
+
+
+# USER SIM COMMANDS
+sim_pre_cmd:
+		
+sim_post_cmd:
+		
+
+CLEAN_TARGETS := $(LIBS) modelsim.ini transcript
+
+clean:
+		rm -rf $(CLEAN_TARGETS)
+mrproper: clean
+		rm -rf *.vcd *.wlf
+
+.PHONY: mrproper clean sim_pre_cmd sim_post_cmd simulation
--- a/testsuite/043local_fetch/Manifest.py
+++ b/testsuite/043local_fetch/Manifest.py
+action = "simulation"
+
+sim_tool="modelsim"
+
+top_module = "gate"
+
+#files = [ "../files/gate_tb.vhdl" ]
+modules = { 'local': [ "sub1"]}
--- a/testsuite/043local_fetch/sub1/Manifest.py
+++ b/testsuite/043local_fetch/sub1/Manifest.py
+files = [ "../../files/gate.vhdl" ]
--- a/testsuite/044files_dir/Makefile.ref
+++ b/testsuite/044files_dir/Makefile.ref
+########################################
+#  This file was generated by hdlmake  #
+#  http://ohwr.org/projects/hdl-make/  #
+########################################
+
+TOP_MODULE := gate
+PWD := $(shell pwd)
+
+MODELSIM_INI_PATH := ../linux_fakebin/..
+
+VCOM_FLAGS := -quiet -modelsimini modelsim.ini 
+VSIM_FLAGS := 
+VLOG_FLAGS := -quiet -modelsimini modelsim.ini 
+VMAP_FLAGS := -modelsimini modelsim.ini 
+#target for performing local simulation
+local: sim_pre_cmd simulation sim_post_cmd
+
+VERILOG_SRC := 
+VERILOG_OBJ := 
+VHDL_SRC := ../files/gate.vhdl \
+
+VHDL_OBJ := work/gate/.gate_vhdl \
+
+INCLUDE_DIRS :=
+LIBS := work
+LIB_IND := work/.work
+
+simulation: modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
+$(VERILOG_OBJ) : modelsim.ini
+$(VHDL_OBJ): $(LIB_IND) modelsim.ini
+
+modelsim.ini: $(MODELSIM_INI_PATH)/modelsim.ini
+		cp $< . 2>&1
+work/.work:
+	(vlib work && vmap $(VMAP_FLAGS) work && touch work/.work )|| rm -rf work 
+
+
+work/gate/.gate_vhdl: ../files/gate.vhdl
+		vcom $(VCOM_FLAGS) -work work $< 
+		@mkdir -p $(dir $@) && touch $@ 
+
+
+# USER SIM COMMANDS
+sim_pre_cmd:
+		
+sim_post_cmd:
+		
+
+CLEAN_TARGETS := $(LIBS) modelsim.ini transcript
+
+clean:
+		rm -rf $(CLEAN_TARGETS)
+mrproper: clean
+		rm -rf *.vcd *.wlf
+
+.PHONY: mrproper clean sim_pre_cmd sim_post_cmd simulation
--- a/testsuite/044files_dir/Manifest.py
+++ b/testsuite/044files_dir/Manifest.py
+action = "simulation"
+
+sim_tool="modelsim"
+
+top_module = "gate"
+
+files = [ "../files" ]
--- a/testsuite/test_all.py
+++ b/testsuite/test_all.py
@@ -217,6 +217,14 @@ def test_no_syn_tool():
 def test_no_files():
    run([], path="042nofiles")

+def test_local043():
+    run_compare(path="043local_fetch")
+
+def test_files_dir():
+    # Not sure we want to keep this feature: allow to specify a directory
+    # as a file (will be replaced by all the files in the directory)
+    run_compare(path="044files_dir")
+
 @pytest.mark.xfail
 def test_xfail():
    """This is a self-consistency test: the test is known to fail"""