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Hdlmake
Commit 1428cb08 authored by Javier D. Garcia-Lasheras's avatar Javier D. Garcia-Lasheras
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Refactor how the combined project manifest is calculated

parent 212d24b3
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Showing with 24 additions and 22 deletions
hdlmake/action/action.py
View file @ 1428cb08
...@@ -131,6 +131,19 @@ class Action(list): ...@@ -131,6 +131,19 @@ class Action(list):
"""Get the Top module from the pool""" """Get the Top module from the pool"""
return self.top_module return self.top_module
def get_config_dict(self):
"""Get the combined hierarchical Manifest dictionary from the pool"""
config_dict = {}
for mod in self:
manifest_dict_tmp = mod.manifest_dict
if 'fetchto' in manifest_dict_tmp:
manifest_dict_tmp['fetchto'] = path_mod.relpath(os.path.join(
mod.path,
mod.manifest_dict['fetchto']))
manifest_dict_tmp.update(config_dict)
config_dict = manifest_dict_tmp
return config_dict
def _add(self, new_module): def _add(self, new_module):
"""Add the given new module if this is not already in the pool""" """Add the given new module if this is not already in the pool"""
from hdlmake.module import Module from hdlmake.module import Module
......
hdlmake/action/core.py
View file @ 1428cb08
...@@ -127,6 +127,12 @@ class ActionCore(Action): ...@@ -127,6 +127,12 @@ class ActionCore(Action):
for mod_aux in unfetched_modules: for mod_aux in unfetched_modules:
logging.warning( logging.warning(
"List incomplete, module %s has not been fetched!", mod_aux) "List incomplete, module %s has not been fetched!", mod_aux)
print("88888888888888888888888888888888888888")
for module in self:
print(module.manifest_dict.get("action"))
print(module.manifest_dict.get("syn_top"))
print(module.manifest_dict.get("sim_top"))
print("88888888888888888888888888888888888888")
file_set = self.build_file_set(top_entity=self.env.options.top) file_set = self.build_file_set(top_entity=self.env.options.top)
file_list = dep_solver.make_dependency_sorted_list(file_set) file_list = dep_solver.make_dependency_sorted_list(file_set)
files_str = [file_aux.path for file_aux in file_list] files_str = [file_aux.path for file_aux in file_list]
......
hdlmake/tools/make_sim.py
View file @ 1428cb08
...@@ -33,15 +33,7 @@ class ToolSim(ToolMakefile): ...@@ -33,15 +33,7 @@ class ToolSim(ToolMakefile):
def simulation_makefile(self, pool): def simulation_makefile(self, pool):
"""Execute the simulation action""" """Execute the simulation action"""
pool.check_all_fetched_or_quit() pool.check_all_fetched_or_quit()
manifest_project_dict = {} manifest_project_dict = pool.get_config_dict()
for mod in pool:
manifest_project_dict.update(mod.manifest_dict)
if 'fetchto' in mod.manifest_dict:
self.repo_list.append(
os.path.abspath(
os.path.join(
mod.path,
mod.manifest_dict['fetchto'])))
_check_simulation_manifest(manifest_project_dict) _check_simulation_manifest(manifest_project_dict)
fset = pool.build_file_set( fset = pool.build_file_set(
manifest_project_dict.get("sim_top"), manifest_project_dict.get("sim_top"),
......
hdlmake/tools/make_syn.py
View file @ 1428cb08
...@@ -42,15 +42,7 @@ class ToolSyn(ToolMakefile): ...@@ -42,15 +42,7 @@ class ToolSyn(ToolMakefile):
def synthesis_project(self, pool): def synthesis_project(self, pool):
"""Generate a project for the specific synthesis tool""" """Generate a project for the specific synthesis tool"""
pool.check_all_fetched_or_quit() pool.check_all_fetched_or_quit()
manifest_project_dict = {} manifest_project_dict = pool.get_config_dict()
for mod in pool:
manifest_project_dict.update(mod.manifest_dict)
if 'fetchto' in mod.manifest_dict:
self.repo_list.append(
os.path.abspath(
os.path.join(
mod.path,
mod.manifest_dict['fetchto'])))
_check_synthesis_manifest(manifest_project_dict) _check_synthesis_manifest(manifest_project_dict)
top_module = pool.get_top_module() top_module = pool.get_top_module()
fileset = pool.build_file_set( fileset = pool.build_file_set(
......
hdlmake/tools/makefile.py
View file @ 1428cb08
...@@ -45,7 +45,6 @@ class ToolMakefile(object): ...@@ -45,7 +45,6 @@ class ToolMakefile(object):
self._hdl_files = [] self._hdl_files = []
self._supported_files = [] self._supported_files = []
self._standard_libs = [] self._standard_libs = []
self.repo_list = []
self.fileset = None self.fileset = None
if filename: if filename:
self._filename = filename self._filename = filename
......
hdlmake/tools/xilinx.py
View file @ 1428cb08
...@@ -82,9 +82,9 @@ if {{ $$keyword != "Complete!" }} {{ ...@@ -82,9 +82,9 @@ if {{ $$keyword != "Complete!" }} {{
['part', syn_device + syn_package + syn_grade, 'current_project'], ['part', syn_device + syn_package + syn_grade, 'current_project'],
['target_language', 'VHDL', 'current_project'], ['target_language', 'VHDL', 'current_project'],
['top', syn_top, 'get_property srcset [current_run]']] ['top', syn_top, 'get_property srcset [current_run]']]
if not self.repo_list == []: fetchto = self.manifest_dict.get("fetchto")
repo_string = '{' + " ".join(self.repo_list) + '}' if not fetchto is None:
properties.append(['ip_repo_paths', repo_string, 'current_fileset']) properties.append(['ip_repo_paths', fetchto, 'current_fileset'])
if not syn_properties is None: if not syn_properties is None:
properties.extend(syn_properties) properties.extend(syn_properties)
for prop in properties: for prop in properties:
......
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