Commits · d4e66a5ce828f784cc163387a78ba5c39337bc24 · Projects / Gennum GN4124 core · GitLab

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Sep 04, 2019
- [sim] update testbench · d4e66a5c
  Dimitris Lampridis authored 5 years ago
  
  d4e66a5c
Aug 30, 2019
- example_tb: add a simpler multi access DMA transfer. · 542aa7ea
  Tristan Gingold authored 5 years ago
  
  542aa7ea
Aug 29, 2019
- [sim] update BFM and testbench to be able to do proper DMA reads/writes · d601caf2
  Dimitris Lampridis authored 5 years ago and Tristan Gingold committed 5 years ago
  
  d601caf2
Aug 08, 2019
- [hdl] test, verify and enable byte swap feature · 90539571
  Dimitris Lampridis authored 5 years ago
  
  90539571
- [hdl] update and expand example testbench · 3159ffcd
  Dimitris Lampridis authored 5 years ago
  
  3159ffcd
Aug 06, 2019
- [hdl] update example testbench to also test DMA aborts · 5e368b58
  Dimitris Lampridis authored 5 years ago
  
  5e368b58
- [hdl] sanitise folder structure · 352c0db5
  Dimitris Lampridis authored 5 years ago
  
  352c0db5
Aug 01, 2019
- example_tb: also check irq status. · d46281e6
  Tristan Gingold authored 5 years ago
  
  d46281e6
- Use cheby to describe registers, only one interrupt (level). · 07f494ff
  Tristan Gingold authored 5 years ago
  
  07f494ff
Apr 26, 2019
- sim: add a reset signal to the testbench, makes simulators happier · 89701fe0
  Dimitris Lampridis authored 5 years ago
  
  89701fe0
Jan 29, 2019
- sim: extend example testbench to also perform DMA reads from a pre-initialised memory · 5d816c79
  Dimitris Lampridis authored 6 years ago
  
  5d816c79
Jan 23, 2019
- hdl: introduce example_tb testbench to demonstrate basic use of GN4124 BFM · 254c6ef9
  Dimitris Lampridis authored 6 years ago
  
  254c6ef9