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Platform-independent core collection
Commit db140cf4 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski
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dsp/gc_soft_ramp_switch: added immediate kill/squelch output control signal

parent 34d51acc
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Showing with 7 additions and 2 deletions
modules/dsp/gc_soft_ramp_switch.vhd
View file @ db140cf4
...@@ -20,6 +20,7 @@ entity gc_soft_ramp_switch is ...@@ -20,6 +20,7 @@ entity gc_soft_ramp_switch is
rate_i : in std_logic_vector(15 downto 0); rate_i : in std_logic_vector(15 downto 0);
on_i : in std_logic; on_i : in std_logic;
kill_i : in std_logic;
is_on_o : out std_logic; is_on_o : out std_logic;
is_off_o : out std_logic; is_off_o : out std_logic;
...@@ -68,7 +69,7 @@ begin ...@@ -68,7 +69,7 @@ begin
p_switch : process(clk_i) p_switch : process(clk_i)
begin begin
if rising_edge(clk_i) then if rising_edge(clk_i) then
if rst_i = '1' then if rst_i = '1' or kill_i = '1' then
state <= SW_OFF; state <= SW_OFF;
ramp_integ <= (others => '0'); ramp_integ <= (others => '0');
is_off_o <= '1'; is_off_o <= '1';
...@@ -139,7 +140,11 @@ begin ...@@ -139,7 +140,11 @@ begin
y_valid_o <= x_valid_i; y_valid_o <= x_valid_i;
for i in 0 to g_NUM_CHANNELS loop for i in 0 to g_NUM_CHANNELS loop
yo(i) <= f_mul_sar(xi(i), mulf, g_DATA_BITS); if kill_i = '0' then
yo(i) <= f_mul_sar(xi(i), mulf, g_DATA_BITS);
else
yo(i) <= (others => '0');
end if;
end loop; end loop;
end if; end if;
end if; end if;
......
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