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Platform-independent core collection
Commit 91ebb21c authored by Alexis Marquet's avatar Alexis Marquet
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fix missing statement that would pulse almost_full_int in simulation

parent 4273aed0
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modules/genrams/common/inferred_async_fifo_dual_rst.vhd
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......@@ -282,6 +282,7 @@ begin -- arch
if rising_edge(clk_wr_i) then
if rst_wr_n_i = '0' then
almost_full_int <= '0';
wr_count <= (others => '0');
else
wr_count <= std_logic_vector(unsigned(wcb.bin) - unsigned(rcb.bin_x));
if (unsigned(wr_count) < g_almost_full_threshold) then
......
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