genrams: KEEP attribute for FIFO resets to facilitate constraining

8170acea · Tomasz Wlostowski · 347e0de1 · 8170acea · 8170acea
Commit 8170acea authored Feb 02, 2022 by Tomasz Wlostowski
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inferred_async_fifo.vhd modules/genrams/common/inferred_async_fifo.vhd +3 -0

inferred_async_fifo_dual_rst.vhd modules/genrams/common/inferred_async_fifo_dual_rst.vhd +4 -0

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--- a/modules/genrams/common/inferred_async_fifo.vhd
+++ b/modules/genrams/common/inferred_async_fifo.vhd
@@ -136,6 +136,9 @@ architecture syn of inferred_async_fifo is

  signal q_int : std_logic_vector(g_data_width-1 downto 0) := (others => '0');

+  attribute keep : string;
+  attribute keep of rst_n_i : signal is "true";
+  
 begin  -- syn

  rd_int <= rd_i and not empty_int;

--- a/modules/genrams/common/inferred_async_fifo_dual_rst.vhd
+++ b/modules/genrams/common/inferred_async_fifo_dual_rst.vhd
@@ -126,6 +126,10 @@ architecture arch of inferred_async_fifo_dual_rst is

  signal q_int : std_logic_vector(g_data_width-1 downto 0) := (others => '0');

+  attribute keep : string;
+  attribute keep of rst_wr_n_i : signal is "true";
+  attribute keep of rst_rd_n_i : signal is "true";
+  
 begin  -- arch

  rd_int <= rd_i and not empty_int;