secded_ecc.vhd: add header

7ce3d54d · Tristan Gingold · 12f068a6 · 7ce3d54d
Commit 7ce3d54d authored Dec 03, 2021 by Tristan Gingold
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secded_ecc.vhd modules/radtol/secded_ecc.vhd +24 -1

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--- a/modules/radtol/secded_ecc.vhd
+++ b/modules/radtol/secded_ecc.vhd
+--------------------------------------------------------------------------------
+-- CERN BE-CO-HT
+-- General Cores Library
+-- https://www.ohwr.org/projects/general-cores
+--------------------------------------------------------------------------------
+--
+-- unit name:   secded_ecc
+--
+-- description: SECDED RAM controller
+--
+--------------------------------------------------------------------------------
+-- Copyright CERN 2020-2021
+--------------------------------------------------------------------------------
+-- Copyright and related rights are licensed under the Solderpad Hardware
+-- License, Version 2.0 (the "License"); you may not use this file except
+-- in compliance with the License. You may obtain a copy of the License at
+-- http://solderpad.org/licenses/SHL-2.0.
+-- Unless required by applicable law or agreed to in writing, software,
+-- hardware and materials distributed under this License is distributed on an
+-- "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
+-- or implied. See the License for the specific language governing permissions
+-- and limitations under the License.
+--------------------------------------------------------------------------------
+
 library ieee;
 use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;

 entity secded_ecc is
  generic (