Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
P
Platform-independent core collection
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
18
Issues
18
List
Board
Labels
Milestones
Merge Requests
6
Merge Requests
6
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Platform-independent core collection
Commits
6a2e4cd2
Commit
6a2e4cd2
authored
Feb 17, 2022
by
Tomasz Wlostowski
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
dsp/gc_cordic: fix translation errors introduced while porting the design from VE
parent
8deef6d9
Expand all
Hide whitespace changes
Inline
Side-by-side
Showing
7 changed files
with
231 additions
and
208 deletions
+231
-208
cordic_init.vhd
modules/dsp/cordic_init.vhd
+166
-167
cordic_modulo_360.vhd
modules/dsp/cordic_modulo_360.vhd
+7
-7
cordic_xy_logic_hd.vhd
modules/dsp/cordic_xy_logic_hd.vhd
+9
-4
cordic_xy_logic_nhd.vhd
modules/dsp/cordic_xy_logic_nhd.vhd
+20
-12
cordic_xy_logic_nmhd.vhd
modules/dsp/cordic_xy_logic_nmhd.vhd
+3
-3
gc_cordic.vhd
modules/dsp/gc_cordic.vhd
+8
-6
gc_cordic_pkg.vhd
modules/dsp/gc_cordic_pkg.vhd
+18
-9
No files found.
modules/dsp/cordic_init.vhd
View file @
6a2e4cd2
This diff is collapsed.
Click to expand it.
modules/dsp/cordic_modulo_360.vhd
View file @
6a2e4cd2
...
...
@@ -26,7 +26,7 @@ use work.gc_cordic_pkg.all;
entity
cordic_modulo_360
is
generic
(
g_M
:
positive
:
=
16
;
g_ANGLE_
MODE
:
t_CORDIC_ANGLE_FORMAT
g_ANGLE_
FORMAT
:
integer
);
port
(
cor_submode_i
:
in
t_CORDIC_SUBMODE
;
...
...
@@ -45,20 +45,20 @@ architecture rtl of cordic_modulo_360 is
signal
gt
,
lt
:
std_logic
;
constant
c_M180D
:
signed
(
g_M
downto
0
)
:
=
f_pick
(
g_ANGLE_
MODE
=
S8_7
,
c_DegMinus180HD_X
(
32
downto
32
-
g_M
),
c_FSDegMinus180HD_X
(
32
downto
32
-
g_M
));
f_pick
(
g_ANGLE_
FORMAT
=
c_ANGLE_FORMAT_
S8_7
,
c_DegMinus180HD_X
(
32
downto
32
-
g_M
),
c_FSDegMinus180HD_X
(
32
downto
32
-
g_M
));
constant
c_P180D
:
signed
(
g_M
downto
0
)
:
=
f_pick
(
g_ANGLE_
MODE
=
S8_7
,
c_DegPlus180HD_X
(
32
downto
32
-
g_M
),
c_FSDegPlus180HD_X
(
32
downto
32
-
g_M
));
f_pick
(
g_ANGLE_
FORMAT
=
c_ANGLE_FORMAT_
S8_7
,
c_DegPlus180HD_X
(
32
downto
32
-
g_M
),
c_FSDegPlus180HD_X
(
32
downto
32
-
g_M
));
constant
c_OFFS_ZERO
:
signed
(
g_M
downto
0
)
:
=
f_pick
(
g_ANGLE_
MODE
=
S8_7
,
c_DegZeroHD_X
(
32
downto
32
-
g_M
),
c_FSDegZeroHD_X
(
32
downto
32
-
g_M
));
f_pick
(
g_ANGLE_
FORMAT
=
c_ANGLE_FORMAT_
S8_7
,
c_DegZeroHD_X
(
32
downto
32
-
g_M
),
c_FSDegZeroHD_X
(
32
downto
32
-
g_M
));
constant
c_OFFS_P360D
:
signed
(
g_M
downto
0
)
:
=
f_pick
(
g_ANGLE_
MODE
=
S8_7
,
c_DegPlus360HD_X
(
32
downto
32
-
g_M
),
c_FSDegPlus360HD_X
(
32
downto
32
-
g_M
));
f_pick
(
g_ANGLE_
FORMAT
=
c_ANGLE_FORMAT_
S8_7
,
c_DegPlus360HD_X
(
32
downto
32
-
g_M
),
c_FSDegPlus360HD_X
(
32
downto
32
-
g_M
));
constant
c_OFFS_N360D
:
signed
(
g_M
downto
0
)
:
=
f_pick
(
g_ANGLE_
MODE
=
S8_7
,
c_DegMinus360HD_X
(
32
downto
32
-
g_M
),
c_FSDegMinus360HD_X
(
32
downto
32
-
g_M
));
f_pick
(
g_ANGLE_
FORMAT
=
c_ANGLE_FORMAT_
S8_7
,
c_DegMinus360HD_X
(
32
downto
32
-
g_M
),
c_FSDegMinus360HD_X
(
32
downto
32
-
g_M
));
begin
...
...
@@ -82,7 +82,7 @@ begin
variable
angle_out
:
signed
(
g_M
downto
0
);
variable
lim_out
:
std_logic
;
begin
if
cor_submode_i
=
CIRCULAR
then
if
cor_submode_i
=
c_SUBMODE_
CIRCULAR
then
if
(
lt
=
'1'
and
gt
=
'0'
)
then
f_limit_add
(
signed
(
angle_i
),
c_OFFS_P360D
,
angle_out
,
lim_out
);
elsif
(
lt
=
'0'
and
gt
=
'1'
)
then
...
...
modules/dsp/cordic_xy_logic_hd.vhd
View file @
6a2e4cd2
...
...
@@ -71,7 +71,8 @@ begin
end
process
;
rst_l
<=
rst_d
or
rst_i
;
rst_o
<=
rst_l
;
process
(
clk_i
)
variable
xi_muxed
:
signed
(
g_M
-1
downto
0
);
...
...
@@ -100,17 +101,21 @@ begin
case
cor_submode_i
is
when
LINEAR
=>
when
c_SUBMODE_
LINEAR
=>
-- scntrl = 1, updmode = 0
yi_muxed
:
=
(
others
=>
'0'
);
-- scntrl = 1, updmode = 1
when
CIRCULAR
=>
when
c_SUBMODE_
CIRCULAR
=>
yi_muxed
:
=
f_limit_negate
(
yi_shifted
,
not
d_i
);
-- scntrl = 0, updmode = 1
when
HYPERBOLIC
=>
when
c_SUBMODE_
HYPERBOLIC
=>
yi_muxed
:
=
f_limit_negate
(
yi_shifted
,
d_i
);
when
others
=>
yi_muxed
:
=
(
others
=>
'0'
);
end
case
;
xi_muxed
:
=
f_limit_negate
(
xi_shifted
,
not
d_i
);
...
...
modules/dsp/cordic_xy_logic_nhd.vhd
View file @
6a2e4cd2
...
...
@@ -10,7 +10,7 @@ entity cordic_xy_logic_nhd is
g_M
:
positive
:
=
16
;
g_J
:
integer
:
=
0
;
g_I
:
integer
:
=
0
;
g_ANGLE_
MODE
:
t_CORDIC_ANGLE_FORMAT
g_ANGLE_
FORMAT
:
integer
);
port
(
clk_i
:
in
std_logic
;
...
...
@@ -45,7 +45,7 @@ architecture rtl of cordic_xy_logic_nhd is
m
:
integer
;
j
:
integer
)
return
signed
is
begin
if
j
<
m
-
2
then
if
j
<
=
m
-
2
then
return
resize
(
vin
(
m
-1
downto
j
),
m
);
else
return
to_signed
(
0
,
m
);
...
...
@@ -57,21 +57,22 @@ architecture rtl of cordic_xy_logic_nhd is
signal
fi
:
signed
(
g_M
-1
downto
0
);
signal
di_int
:
std_logic
;
signal
rst_l
,
rst_d
:
std_logic
;
signal
xi_muxed_s
:
signed
(
g_M
-1
downto
0
);
signal
yi_muxed_s
:
signed
(
g_M
-1
downto
0
);
begin
fi
<=
f_phi_lookup
(
g_I
,
cor_submode_i
,
g_ANGLE_
MODE
)(
g_M
-1
downto
0
);
fi
<=
f_phi_lookup
(
g_I
,
cor_submode_i
,
g_ANGLE_
FORMAT
)(
31
downto
31
-
(
g_M
-1
)
);
xi_shifted
<=
f_shift
(
signed
(
xi_i
),
g_M
,
g_J
);
yi_shifted
<=
f_shift
(
signed
(
yi_i
),
g_M
,
g_J
);
p_gen_di
:
process
(
cor_mode_i
,
yi_i
,
zi_i
)
begin
di_int
<=
'0'
;
if
cor_mode_i
=
VECTOR
then
if
cor_mode_i
=
c_MODE_VECTOR
then
di_int
<=
yi_i
(
g_M
-1
);
else
di_int
<=
zi_i
(
g_M
);
di_int
<=
not
zi_i
(
g_M
);
end
if
;
end
process
;
...
...
@@ -83,7 +84,8 @@ begin
end
process
;
rst_l
<=
rst_d
or
rst_i
;
rst_o
<=
rst_l
;
p_pipe
:
process
(
clk_i
)
variable
xi_muxed
:
signed
(
g_M
-1
downto
0
);
...
...
@@ -112,21 +114,27 @@ begin
case
cor_submode_i
is
when
LINEAR
=>
when
c_SUBMODE_
LINEAR
=>
-- scntrl = 1, updmode = 0
yi_muxed
:
=
(
others
=>
'0'
);
when
CIRCULAR
=>
when
c_SUBMODE_
CIRCULAR
=>
-- scntrl = 1, updmode = 1
yi_muxed
:
=
f_limit_negate
(
yi_shifted
,
not
di_int
);
when
HYPERBOLIC
=>
when
c_SUBMODE_
HYPERBOLIC
=>
-- scntrl = 0, updmode = 1
yi_muxed
:
=
f_limit_negate
(
yi_shifted
,
di_int
);
when
others
=>
yi_muxed
:
=
(
others
=>
'0'
);
end
case
;
xi_muxed
:
=
f_limit_negate
(
xi_shifted
,
not
di_int
);
xi_muxed_s
<=
xi_muxed
;
yi_muxed_s
<=
yi_muxed
;
f_limit_subtract
(
signed
(
xi_i
),
yi_muxed
,
xj_comb
,
xj_limit
);
f_limit_add
(
signed
(
yi_i
),
xi_muxed
,
yj_comb
,
yj_limit
);
...
...
modules/dsp/cordic_xy_logic_nmhd.vhd
View file @
6a2e4cd2
...
...
@@ -14,7 +14,7 @@ entity cordic_xy_logic_nmhd is
g_M
:
positive
:
=
16
;
--AngleMode = Default angle format S8.7 otherwise FS = 180 deg.
g_ANGLE_
MODE
:
t_CORDIC_ANGLE_FORMAT
:
=
S8_7
g_ANGLE_
FORMAT
:
integer
);
port
(
clk_i
:
in
std_logic
;
...
...
@@ -93,7 +93,7 @@ begin
g_M
=>
g_M
,
g_J
=>
g_N
-
1
,
g_I
=>
g_N
-
1
,
g_ANGLE_
MODE
=>
g_ANGLE_MODE
)
g_ANGLE_
FORMAT
=>
g_ANGLE_FORMAT
)
port
map
(
clk_i
=>
clk_i
,
rst_i
=>
loc_Rst
(
g_N
-2
),
...
...
@@ -119,7 +119,7 @@ begin
generic
map
(
g_M
=>
g_M
,
g_J
=>
K
,
g_ANGLE_
MODE
=>
g_ANGLE_MODE
,
g_ANGLE_
FORMAT
=>
g_ANGLE_FORMAT
,
g_I
=>
K
)
port
map
(
clk_i
=>
clk_i
,
...
...
modules/dsp/gc_cordic.vhd
View file @
6a2e4cd2
...
...
@@ -14,7 +14,7 @@ entity gc_cordic is
g_M
:
positive
:
=
16
;
--AngleMode = Default angle format S8.7 otherwise FS = 180 deg.
g_ANGLE_
MODE
:
t_CORDIC_ANGLE_FORMAT
:
=
S8_7
g_ANGLE_
FORMAT
:
integer
:
=
c_ANGLE_FORMAT_FULL_SCALE_180
);
port
(
clk_i
:
in
std_logic
;
...
...
@@ -54,7 +54,7 @@ architecture rtl of gc_cordic is
begin
fi1
<=
std_logic_vector
(
f_phi_lookup
(
0
,
cor_submode_i
,
g_ANGLE_
MODE
));
fi1
<=
std_logic_vector
(
f_phi_lookup
(
0
,
cor_submode_i
,
g_ANGLE_
FORMAT
));
z0_int
<=
std_logic_vector
(
resize
(
signed
(
z0_i
),
g_M
+
1
));
p_latch_lims
:
process
(
clk_i
)
...
...
@@ -73,7 +73,7 @@ begin
U_Cordic_Init
:
entity
work
.
cordic_init
generic
map
(
g_M
=>
g_M
,
g_ANGLE_
MODE
=>
g_ANGLE_MODE
)
g_ANGLE_
FORMAT
=>
g_ANGLE_FORMAT
)
port
map
(
clk_i
=>
clk_i
,
rst_i
=>
rst_i
,
...
...
@@ -87,18 +87,20 @@ begin
z1_o
=>
z1
,
d1_o
=>
d1
);
U_Cordic_Core
:
entity
work
.
cordic_xy_logic_nmhd
generic
map
(
g_N
=>
g_N
-1
,
g_M
=>
g_M
,
g_ANGLE_
MODE
=>
g_ANGLE_MODE
)
g_ANGLE_
FORMAT
=>
g_ANGLE_FORMAT
)
port
map
(
clk_i
=>
clk_i
,
rst_i
=>
rst_i
,
cor_mode_i
=>
cor_mode_i
,
cor_submode_i
=>
cor_submode_i
,
d_i
=>
d1
,
fi1_i
=>
fi1
(
31
downto
31
-
g_M
-
1
),
fi1_i
=>
fi1
(
31
downto
31
-
(
g_M
-
1
)
),
lim_x_i
=>
r_lim_x
,
lim_y_i
=>
r_lim_y
,
xi_i
=>
x1
,
...
...
@@ -114,7 +116,7 @@ begin
U_Fixup_Angle
:
entity
work
.
cordic_modulo_360
generic
map
(
g_M
=>
g_M
,
g_ANGLE_
MODE
=>
g_ANGLE_MODE
)
g_ANGLE_
FORMAT
=>
g_ANGLE_FORMAT
)
port
map
(
cor_submode_i
=>
cor_submode_i
,
angle_i
=>
zj_int
,
...
...
modules/dsp/gc_cordic_pkg.vhd
View file @
6a2e4cd2
...
...
@@ -11,10 +11,19 @@ use ieee.numeric_std.all;
package
gc_cordic_pkg
is
type
t_CORDIC_MODE
is
(
VECTOR
,
ROTATE
);
type
t_CORDIC_SUBMODE
is
(
CIRCULAR
,
LINEAR
,
HYPERBOLIC
);
type
t_CORDIC_ANGLE_FORMAT
is
(
S8_7
,
FULL_SCALE_180
);
subtype
t_CORDIC_MODE
is
Std_logic_vector
(
0
downto
0
);
subtype
t_CORDIC_SUBMODE
is
Std_logic_vector
(
1
downto
0
);
constant
c_ANGLE_FORMAT_S8_7
:
integer
:
=
0
;
constant
c_ANGLE_FORMAT_FULL_SCALE_180
:
integer
:
=
1
;
constant
c_MODE_VECTOR
:
t_CORDIC_MODE
:
=
"0"
;
constant
c_MODE_ROTATE
:
t_CORDIC_MODE
:
=
"1"
;
constant
c_SUBMODE_CIRCULAR
:
t_CORDIC_SUBMODE
:
=
"00"
;
constant
c_SUBMODE_LINEAR
:
t_CORDIC_SUBMODE
:
=
"01"
;
constant
c_SUBMODE_HYPERBOLIC
:
t_CORDIC_SUBMODE
:
=
"11"
;
-- Used by CORDIC algo and init
-- Constant GHHfFReg : Std_logic_vector(19 downto 1) := X"0000"&"000";
constant
c_DegPlus90
:
signed
(
15
downto
0
)
:
=
X"2D00"
;
...
...
@@ -110,9 +119,9 @@ package gc_cordic_pkg is
neg
:
in
std_logic
)
return
signed
;
function
f_phi_lookup
(
stage
:
in
natural
range
0
to
31
;
stage
:
in
teger
;
submode
:
t_CORDIC_SUBMODE
;
angle_
mode
:
t_CORDIC_ANGLE_FORMAT
angle_
format
:
integer
)
return
signed
;
...
...
@@ -192,9 +201,9 @@ package body gc_cordic_pkg is
function
f_phi_lookup
(
stage
:
in
integer
range
0
to
31
;
stage
:
integer
;
submode
:
t_CORDIC_SUBMODE
;
angle_
mode
:
t_CORDIC_ANGLE_FORMAT
angle_
format
:
integer
)
return
signed
is
type
t_LUT
is
array
(
integer
range
<>
)
of
signed
(
31
downto
0
);
...
...
@@ -306,8 +315,8 @@ package body gc_cordic_pkg is
begin
if
submode
=
CIRCULAR
then
if
angle_
mode
=
S8_7
then
if
submode
=
c_SUBMODE_
CIRCULAR
then
if
angle_
format
=
c_ANGLE_FORMAT_
S8_7
then
return
c_LUT_CIRC_A0
(
stage
);
else
return
c_LUT_CIRC_A1
(
stage
);
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment