Grzegorz Daniluk
authored
They finally don't help much and they break simulation as Modelsim complains about types conversion.
338eeed9
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- Branches 20
- master default protected
- gsi_fallout_release_quartus_23_1_1
- 56-axi4_pkg-incorrect-width
- gsi_fallout_release
- harvey-dev
- wrs-v4-dev
- gsi_master_get_back_on_track_2024
- 52-possible_fix_in_wb_uart_rx_fifo
- 51-inferred_async_fifo_dual_reset-spurious-pulse-on-almost_full_int-after-reset
- tom-wrpcv5-dev
- 47-revert-version-of-wb_uart
- 46-demo_vunit_ghdl_testbench
- 45-addition-of-a-register-in-wb_uart-to-show-the-endianess
- proposed_master protected
- cordic_changes
- hm-wrslj-v6
- sowarzan-rf
- tom-proposed-master
- tom-uart-fixes
- wrpc-v4.2-damc-fmc2zup
- Tags 20
- wr-switch-sw-v8.0
- wr-switch-sw-v7.0
- wr-switch-sw-v6.0
- v1.1.4
- v1.1.3
- v1.1.2
- v1.1.1
- v1.1.0
- spec7_v4.2
- btrain-v1.2
- v1.0.2
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- v1.0.4
- v1.0.3
- v1.0.0
- btrain-v2.5
- wr-btrain-v1.1
- masterFIP_v1.1.0
- wrpc-v4.2
- wrpc-v4.1
| Name | Last commit | Last update |
|---|---|---|
| .. | ||
| altera | ||
| common | ||
| generic | ||
| xilinx | ||
| .gitignore | ||
| Manifest.py | ||
| genram_pkg.vhd | ||
| memory_loader_pkg.vhd | ||