pax_global_header 0000666 0000000 0000000 00000000064 13727622346 0014526 g ustar 00root root 0000000 0000000 52 comment=96630ec6636b3ea17b240b6c398a1cdf6c761028
general-cores-v1.1.1/ 0000775 0000000 0000000 00000000000 13727622346 0014442 5 ustar 00root root 0000000 0000000 general-cores-v1.1.1/.gitignore 0000664 0000000 0000000 00000000122 13727622346 0016425 0 ustar 00root root 0000000 0000000 *.*\#
\#*
.\#*
*.*~
work
*.wlf
*.vstf
*.patch
modelsim.ini
*.html
*.o
*.bin
*.elf
general-cores-v1.1.1/.gitlab-ci.yml 0000664 0000000 0000000 00000003017 13727622346 0017077 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: CC0-1.0
#
# SPDX-FileCopyrightText: 2019 CERN
---
variables:
KOJI_TARGET: 'ohwr7'
KOJI_DISTTAG: '.el7.cern'
DIST_PATH: distribution
BUILD_PATH: distribution/rpmbuild
SRPM_PATH: distribution/rpmbuild/SRPMS/dkms-${CI_PROJECT_NAME}*src.rpm
stages:
- static-analysis
- build
- srpm
- kscratch
- kbuild
reuse:
stage: static-analysis
image: fsfe/reuse:latest
script:
- reuse lint
allow_failure: true
build:
stage: build
script:
- yum install -y kernel-devel git
- export LINUX=/usr/src/kernels/*/
- make -C software
build-dkms:
stage: build
script:
- yum install -y kernel-devel lua git dkms
- export LINUX=/usr/src/kernels/*/
- export PREFIX=$(mktemp -d)
- make -C software/ -f dkms.mk dkms_install
- make -C ${PREFIX}/usr/src/${CI_PROJECT_NAME}*/
build_srpm:
stage: srpm
script:
- yum-builddep -y ${DIST_PATH}/*.spec
- export LINUX=/usr/src/kernels/*/
- make -C distribution rpmbuild-source
artifacts:
paths:
- ${SRPM_PATH}
expire_in: 1 day
.koji_deps_template: &koji_deps
before_script:
- yum install -y koji krb5-workstation rpm-build
- echo ${OHWR_PASSWORD} | kinit ${OHWR_USER}
kscratch:
<<: *koji_deps
stage: kscratch
script:
- koji --config=.koji build --wait --scratch ${KOJI_TARGET} ${SRPM_PATH}
kbuild-ohwr:
<<: *koji_deps
stage: kbuild
only:
- /^v[0-9]+\.[0-9]+\.[0-9]+$/
except:
- branches
script:
- koji --config=.koji build --wait ${KOJI_TARGET} ${SRPM_PATH}
general-cores-v1.1.1/.koji 0000664 0000000 0000000 00000000346 13727622346 0015402 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: CC0-1.0
#
# SPDX-FileCopyrightText: 2019 CERN
[koji]
server = https://kojihub.cern.ch/kojihub
weburl = https://koji.cern.ch/
topurl = https://koji.cern.ch/kojifiles
krb_canon_host = no
krb_rdns = False
general-cores-v1.1.1/CHANGELOG.rst 0000664 0000000 0000000 00000004707 13727622346 0016473 0 ustar 00root root 0000000 0000000 ..
SPDX-License-Identifier: CC0-1.0
SPDX-FileCopyrightText: 2019-2020 CERN
==========
Change Log
==========
- Format inspired by: `Keep a Changelog `_
- Versioning scheme follows: `Semantic Versioning `_
1.1.1 - 2020-09-14
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.1
Fixed
-----
- sw: fix SPI driver to update the spi_message->actual_length
1.1.0 - 2020-07-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.1.0
Added
-----
- hdl: New indirect wishbone master (driven by an address and data register).
- hdl: New memory wrapper for Cheby.
- hdl: Provide a simple vhdl package to generate WB transactions.
- hdl: New wb_xc7_fw_update module.
- bld: Introduce gen_sourceid.py script to generate a package with the source id.
Changed
-------
- bld: gen_buildinfo.py now adds tag and dirty flag.
Fixed
-----
- hdl: regression to gc_sync_ffs introduced by v1.0.4.
- hdl: add dummy generic to generic_dpram in altera.
- hdl: add missing generics to generic_sync_fifo in genram_pkg.
- hdl: avoid f_log2() circular dependencies in gc_extend_pulse.
1.0.4 - 2020-03-26
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.4
Added
-----
- [hdl] VHDL functions to convert characters and strings to upper/lower case.
- [sw][i2c] Support for kernel greater than 4.7.
- [hdl] Separate synchroniser and edge detection modules.
- [hdl] 8b10b encoder.
Changed
-------
- [hdl] Rewritten the WB master interface used in simulations.
- [hdl] Reimplement gc_sync_ffs using new synchroniser and edge detectors.
Fixed
-----
- [sw][spi] Align polarity and phase for Rx and Tx.
- [hdl][i2c] Fix reset lock for I2C master.
- [hdl] Avoid cyclic dependencies for log2 ceiling functions.
1.0.3 - 2020-01-15
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.3
Changed
-----
- [sw] add more file to .gitignore
1.0.2 - 2019-10-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.2
Fixed
-----
- [ci] forgot rule to publish RPMs
1.0.1 - 2019-10-24
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.1
Added
-----
- [ci] building and publish RPMs automatically on new releases
Changed
-------
- [sw] Makefiles have been changed to better support RPM generation
1.0.0 - 2019-10-21
==================
https://www.ohwr.org/project/general-cores/tags/v1.0.0
Added
-----
- First release of general-cores.
general-cores-v1.1.1/LICENSES/ 0000775 0000000 0000000 00000000000 13727622346 0015647 5 ustar 00root root 0000000 0000000 general-cores-v1.1.1/LICENSES/CC0-1.0.txt 0000664 0000000 0000000 00000015610 13727622346 0017254 0 ustar 00root root 0000000 0000000 Creative Commons Legal Code
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general-cores-v1.1.1/LICENSES/GPL-2.0.txt 0000664 0000000 0000000 00000043254 13727622346 0017337 0 ustar 00root root 0000000 0000000 GNU GENERAL PUBLIC LICENSE
Version 2, June 1991
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general-cores-v1.1.1/Manifest.py 0000664 0000000 0000000 00000000203 13727622346 0016555 0 ustar 00root root 0000000 0000000 modules = {
"local" : [
"modules/axi",
"modules/common",
"modules/genrams",
"modules/wishbone",
"platform"
]
}
general-cores-v1.1.1/README.md 0000664 0000000 0000000 00000025561 13727622346 0015732 0 ustar 00root root 0000000 0000000 # OHWR General cores
General cores is a library of widely used cores but still small enough not to
require a dedicated repository.
In [modules/common](modules/common) there are general purpose cores:
* The package [gencores_pkg](modules/common/gencores_pkg.vhd) provides the
declarations of the components (this is not required, you can always
directly instantiate the entities) but also some useful subprograms
like functions for gray encode/decode, boolean conversions...
* The package [matrix_pkg](modules/common/matrix_pkg.vhd) declares a 2d
array of std_logic, and some subprograms to handle it.
* Edge detectors are provided by [gc_posedge](modules/common/gc_posedge.vhd),
[gc_negedge](modules/common/gc_negedge.vhd), and
[gc_edge_detect](modules/common/gc_edge_detect.vhd).
* For clock-domain crossing or asynchronous signal register, use
[gc_sync](modules/common/gc_sync.vhd). This is the basic synchronizer.
If you also need an edge detector, use
[gc_sync_ffs](modules/common/gc_sync_ffs.vhd).
The other synchronizer [gc_sync_register](modules/common/gc_sync_register.vhd)
is deprecated. It can synchronize multiple signals at the same time but
doesn't ensure coherency between these signals.
The module [gc_sync_edge](modules/common/gc_sync_edge.vhd) provides a
synchronizer with an (positive or negative) edge detector. The signal
edge is always detected on the rising edge of the clock. This module is
simpler than the gc_sync_ffs module.
To pass words from one clock domain to another, you can use the module
[gc_sync_word_wr](modules/common/gc_sync_word_wr.vhd) for writing data,
and [gc_sync_word_rd](modules/common/gc_sync_word_rd.vhd) for reading
data.
To pass one pulse from one domain to another, use module
[gc_pulse_synchronizer](modules/common/gc_pulse_synchronizer.vhd)
or the version with resets
[gc_pulse_synchronizer2](modules/common/gc_pulse_synchronizer2.vhd)
Module [gc_async_signals_input_stage](modules/common/gc_async_signals_input_stage.vhd)
contains a complex handling for asynchronous signals (crossing clock
domains, deglitcher, edge detection, pulse extension...)
* For reset generation, you can use [gc_reset](modules/common/gc_reset.vhd)
which generate synchronous resets once all the PLL lock signals are set.
The module [gc_reset_multi_aasd](modules/common/gc_reset_multi_aasd.vhd)
generate asynchronously asserted synchronously deasserted resets for
multiple clock domains.
The module [gc_single_reset_gen](modules/common/gc_single_reset_gen.vhd)
is convenient to generate a single reset from multiple sources (like
powerup signal and a reset button).
* Words can be packed or unpacked using the module
[gc_word_packer](modules/common/gc_word_packer.vhd)
* Module [gc_i2c_slave](modules/common/gc_i2c_slave.vhd) provides a simple
i2c slave. This module is used in
[gc_sfp_i2c_adapter](modules/common/gc_sfp_i2c_adapter.vhd) to emulate an
SFP DDM.
* The module [gc_serial_dac](modules/common/gc_serial_dac.vhd) provides an
interface to a serial DAC.
* The module [gc_rr_arbiter](modules/common/gc_rr_arbiter.vhd) provides a
round-robin arbiter amount an arbitrary number of requests. Similarly
[gc_arbitrated_mux](modules/common/gc_arbitrated_mux.vhd) provides
a multiple channel tim-division multiplexr with round robin
arbitration.
* The module [gc_prio_encoder](modules/common/gc_prio_encoder.vhd) provides
a combinational priority encoder.
* Module [gc_bicolor_led_ctrl](modules/common/gc_bicolor_led_ctrl.vhd)
controls multiple bicolor leds, including the intensity.
* Module [gc_big_adder](modules/common/gc_big_adder.vhd) provides a pipelined
adder for wide numbers.
* Module [gc_comparator](modules/common/gc_comparator.vhd) provides a
comparator with hysteresis.
* Module [gc_moving_average](modules/common/gc_moving_average.vhd) compute the
average of values over a sliding window. The size of the window is a power
of 2.
* Module [gc_crc_gen](modules/common/gc_crc_gen.vhd) provides a generic
parallel implementation of crc generator or checker.
* Module [gc_dec_8b10b](modules/common/gc_dec_8b10b.vhd) is an 8-bit to
10-bit decoder.
* Module [gc_delay_gen](modules/common/gc_delay_gen.vhd) is a delay line based
on a pipeline, while module [gc_delay_line](modules/common/gc_delay_line.vhd)
implementation is based on a dual port RAM and provides a valid signal.
* Module [gc_ds182x_readout](modules/common/gc_ds182x_readout.vhd) provides
a one-wire interface for temperature and unique id DS182X chips. It replaces
the deprecated [gc_ds182x_interface](modules/common/gc_ds182x_interface.vhd)
* Module [gc_dual_pi_controller](modules/common/gc_dual_pi_controller.vhd) is
a two channels, proportional integral (PI) controller.
* To extend a pulse, several modules are provided:
- [gc_dyn_extend_pulse](modules/common/gc_dyn_extend_pulse.vhd) has an input
for the length.
- [gc_extend_pulse](modules/common/gc_extend_pulse.vhd) has a fixed length.
* To deglitch a signal:
- [gc_dyn_glitch_filt](modules/common/gc_dyn_glitch_filt.vhd) accepts
the minimum length as an input.
- [gc_glitch_filt](modules/common/gc_glitch_filt.vhd) is static: the
length is provided as a parameter.
* Module [gc_fsm_watchdog](modules/common/gc_fsm_watchdog.vhd) provides a
simple watchdog.
* To mesure a frequency:
- [gc_frequency_meter](modules/common/gc_frequency_meter.vhd) provides a
single channel counter.
- [gc_multichannel_frequency_meter](modules/common/gc_multichannel_frequency_meter.vhd) is an optimized version for multiple channels.
In [modules/genrams](modules/genrams) there are fifo and ram cores:
The convention is to use generic_xxx modules whose implementation may depend
on the target.
* The package [genram_pkg](modules/genrams/genram_pkg.vhd) declares ram types,
utility functions and the components.
* The package [memory_loader_pkg](modules/genrams/memory_loader_pkg.vhd)
declares functions that reads data from a file. They are useful to
initialize the rams (and can be used for synthesis).
* The module generic_spram available for
[altera](modules/genrams/altera/generic_spram.vhd) and for
[xilinx](modules/genrams/xilinx/generic_spram.vhd) is a simple port synchronous
ram.
* The module generic_simple_dpram available for
[altera](modules/genrams/altera/generic_simple_dpram.vhd) and for
[xilinx](modules/genrams/xilinx/generic_simple_dpram.vhd) is a dual port,
dual clock, synchronous ram. The port A is write-only, the port B is
read-only.
* The module generic_dpram available for
[altera](modules/genrams/altera/generic_dpram.vhd) and for
[xilinx](modules/genrams/xilinx/generic_dpram.vhd) is a dual port,
dual clock, synchronous ram. Both ports are read/write.
* The module generic_dpram_mixed available for
[altera](modules/genrams/altera/generic_dpram_mixed.vhd) is a dual port,
dual clock, synchronous ram. Both ports are read/write, and the size of
the ports can be different.
* The module [generic_sync_fifo](modules/genrams/generic/generic_sync_fifo.vhd)
is a synchronous fifo, with multiple flags available.
* The module [generic_async_fifo](modules/genrams/generic/generic_async_fifo.vhd)
is also a fifo with multiple flags available, but with different clocks for
inputs and outputs.
* The module [generic_async_fifo_dual_rst](modules/genrams/generic/generic_async_fifo_dual_rst.vhd)
is also a fifo with multiple flags available, but with different clocks for
inputs and outputs and with a reset input for each clock domain.
* The module [generic_shiftreg_fifo](modules/genrams/common/generic_shiftreg_fifo.vhd)
is a synchronous fifo based on shift registers.
Directory [modules/wishbone](modules/wishbone) contains modules for wishbone.
* The package [wishbone_pkg](modules/wishbone/wishbone_pkg.vhd) declare
the records for the wishbone bus and some utilities.
* There are several peripherals:
- [wb_dma](modules/wishbone/wb_dma) is a dma controller.
- [wb_dpram](modules/wishbone/wb_dpram) is a dual port ram controlled by two
wishbone buses.
- [wb_gpio_port](modules/wishbone/wb_gpio_port) is a gpio controller.
- [wb_i2c_bridge](modules/wishbone/wb_i2c_bridge) is an i2c slave to
wishbone master.
- [wb_i2c_master]](modules/wishbone/wb_i2c_master) is an i2c master.
- [wb_irq](modules/wishbone/wb_irq) contains irq controllers and generators.
- [wb_onewire_master](modules/wishbone/wb_onewire_master) is a onewire master.
- [wb_serial_lcd](modules/wishbone/wb_serial_lcd) is an lcd controller.
- [wb_simple_pwm](modules/wishbone/wb_simple_pwm) is a pwm controller supporting
up to 8 channels.
- [wb_simple_timer](modules/wishbone/wb_simple_timer) is a simple counter.
- [wb_spi](modules/wishbone/wb_spi) is an spi controller
- [wb_spi_flash](modules/wishbone/wb_spi_flash) is an spi flash controller
- [wb_uart](modules/wishbone/wb_uart) is an uart.
- [wb_vic](modules/wishbone/wb_vic) is the vectored interrupt controller.
- [wb_ds182x_readout](modules/wishbone/wb_ds182x_readout) is a direct
interface to the digital thermometer.
- [wb_xc7_fw_update](modules/wishbone/wb_xc7_fw_update) is an SPI interface
to drive the xc7 bitstream spi flash (using the ht-flash tool).
* There are utilities to handle a wishbone bus:
- [wb_clock_crossing](modules/wishbone/wb_clock_crossing) handle clock domain
crossing.
- [wb_register](modules/wishbone/wb_register) add a pipeline register.
* There are modules to convert to a different bus
- [wb_async_bridge](modules/wishbone/wb_async_bridge) is a bridge with the
AT91SAM9x CPU external bus interface.
- [wb_axi4lite_bridge](modules/wishbone/wb_axi4lite_bridge) is an axi4lite
to wishbone bridge
- [wb16_to_wb32](modules/wishbone/wb16_to_wb32) is an adapter from a
16 data bit wishbone master to a 32 data bit wishbone slave. It uses
an intermediate register. Refer to the module for how to use it.
* There are modules for axi4 bus
- [axi4lite32_axi4full64_bridge](modules/axi/axi4lite32_axi4full64_bridge) is
a bridge from axi4full64 to axi4lite32. It was defined to interface with
the Vivado PCI-e bridge and doesn't support all the axi4full features
(in particular the burst accesses).
* There a modules to build a bus hierarchy:
- [wb_bus_fanout](modules/wishbone/wb_bus_fanout) is a simple master to
multiple slave decoder.
- [wb_crossbar](modules/wishbone/wb_crossbar) is a generic multiple masters
and multiple slaves crossbar.
- [wb_split](modules/wishbone/wb_split) is a very simple crossbar for 1
master and 2 slaves.
- [wb_remapper](modules/wishbone/wb_remapper) allows to remap addresses.
- [wb_conmax](modules/wishbone/wb_conmax) is an interconnect matrix,
superseeded by the crossbar.
- [wb_metadata](modules/wishbone/wb_metadata) is a little helper to
create metadata for the convention.
- [wb_indirect](modules/wishbone/wb_indirect) provides a wishbone
master driven by an address and a data registers.
general-cores-v1.1.1/common.mk 0000664 0000000 0000000 00000000373 13727622346 0016266 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: CC0-1.0
#
# SPDX-FileCopyrightText: 2019 CERN
PREFIX ?= /
GIT_VERSION := $(shell git describe --always --dirty --long --tags)
VERSION := $(shell git describe --tags --abbrev=0 | tr -d 'v')
GCORES_SW := $(GCORES)/software
general-cores-v1.1.1/distribution/ 0000775 0000000 0000000 00000000000 13727622346 0017161 5 ustar 00root root 0000000 0000000 general-cores-v1.1.1/distribution/.gitignore 0000664 0000000 0000000 00000000123 13727622346 0021145 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: CC0-1.0
#
# SPDX-FileCopyrightText: 2019 CERN
rpmbuild
general-cores-v1.1.1/distribution/Makefile 0000664 0000000 0000000 00000001203 13727622346 0020615 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: CC0-1.0
#
# SPDX-FileCopyrightText: 2019 CERN
TOPDIR ?= $(shell pwd)/../
TRTL ?= $(TOPDIR)
include $(TRTL)/common.mk
NAME := general-cores
SPEC_RPM := $(NAME).spec
DEST := rpmbuild
tar-post = \
$(eval tmpdir := $(shell mktemp -d)) \
tar --extract -C $(tmpdir)/ -f $(1) \
$(2)/common.mk && \
sed -e "s,^GIT_VERSION.*$$,GIT_VERSION := "$(GIT_VERSION)"," \
-e "s,^VERSION.*$$,VERSION := "$(VERSION)"," \
-i $(tmpdir)/$(2)/common.mk && \
tar --update -C $(tmpdir) -f $(1) \
$(2)/common.mk && \
rm -rf $(tmpdir)
all: rpmbuild-all
clean: rpmbuild-clean
include rpmbuild.mk
.PHONY: all clean
general-cores-v1.1.1/distribution/general-cores.spec 0000664 0000000 0000000 00000001757 13727622346 0022575 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: GPL-3.0-or-later
#
# SPDX-FileCopyrightText: 2019 CERN
%define project_name general-cores
Summary: General Cores Drivers
Name: dkms-%{project_name}
Version: %{?_build_version}
License: GPL-2.0
Release: 1%{?dist}
URL: https://www.ohwr.org/projects/general-cores/
BuildRequires: make, gcc, git
Requires: dkms
Source0: %{project_name}-%{version}.tar.gz
Source1: CHANGELOG
%description
This package installs all general-cores drivers
%prep
%autosetup -n %{project_name}-%{version}
%build
%install
make -C software PREFIX=%{buildroot}/ -f dkms.mk dkms_install
%post
dkms add -m %{project_name} -v %{version} --rpm_safe_upgrade
dkms build -m %{project_name} -v %{version} --rpm_safe_upgrade
dkms install -m %{project_name} -v %{version} --rpm_safe_upgrade
%preun
dkms remove -m %{project_name} -v %{version} --rpm_safe_upgrade --all ||:
%files
%license LICENSES/CC0-1.0.txt
%license LICENSES/GPL-2.0.txt
/usr/src/%{project_name}-%{version}/*
%changelog
%include %{SOURCE1}
general-cores-v1.1.1/distribution/rpmbuild.mk 0000664 0000000 0000000 00000005555 13727622346 0021342 0 ustar 00root root 0000000 0000000 # SPDX-License-Identifier: GPL-3.0-or-later
# SPDX-FileCopyrightText: 2019 CERN
# Author: Federico Vaga
#
# Required Project Variables And Functions
#
ifndef TOPDIR
$(error "Define project top-level directory: TOPDIR")
endif
ifndef NAME
$(error "Define project name: NAME")
endif
ifndef VERSION
$(error "Define project version: VERSION")
endif
ifndef SPEC_RPM
$(error "Define RPM spec file: SPEC_RPM")
endif
#
# Internal Variables
#
FULL_NAME := $(NAME)-$(VERSION)
DEST ?= rpmbuild
RPMBUILD := $(shell /bin/pwd)/$(DEST)
SOURCES := $(RPMBUILD)/SOURCES
SRC_TAR := $(SOURCES)/$(FULL_NAME).tar
SRC_TAR_GZ := $(SOURCES)/$(FULL_NAME).tar.gz
CHANGELOG := $(SOURCES)/CHANGELOG
SPEC := $(RPMBUILD)/SPECS/$(FULL_NAME).spec
#
# Requirements
# - git (if this is a git repository)
#
GIT ?= git
ifeq (,$(shell which $(GIT)))
$(error "The tool 'git' is required to process '$@'")
endif
#
# Targets
#
# Prepare working directories
$(RPMBUILD):
@mkdir -p $@/{BUILD,BUILDROOT,RPMS,SOURCES,SPECS,SRPMS}
# Build a tar with all sources with the assumption that sources
# are handled with a git repository. Otherwise, rewrite this rule
# in order to get get a clean tar.
$(SRC_TAR): $(RPMBUILD)
@cd $(TOPDIR) && \
$(GIT) archive --format=tar -o $@ --prefix=$(FULL_NAME)/ HEAD
ifdef tar-post
# Extra processing on the tar file.
# Modify this target according to project needs, if you do not use git-archive
# then do everything right while you are building your tar file
$(warning "Post processing tar file")
@$(call tar-post,$@,$(FULL_NAME))
endif
# Compress sources (optional)
$(SRC_TAR_GZ): $(SRC_TAR) $(RPMBUILD)
@rm -f $@ # remove any previous archive
@gzip $<
# Create an RPM compatible CHANGELOG from the project format
# (see https://keepachangelog.com/en/1.0.0/)
$(CHANGELOG): $(SRC_TAR_GZ)
$(eval $@_pattern := ^\[([0-9]+\.[0-9]+\.[0-9]+)\]\s-\s([0-9]{4}-[0-9]{2}-[0-9]{2})$)
$(eval $@_replace := echo -e "\n"\\* `date --date="\2" "+%a %b %d %Y"` "\1")
@tar -C $(SOURCES) -xf $< $(FULL_NAME)/CHANGELOG.rst
@mv $(SOURCES)/$(FULL_NAME)/CHANGELOG.rst $(CHANGELOG)
@rmdir $(SOURCES)/$(FULL_NAME)
@sed -r -i -e "1,+10d" -e "/^(=|-|\s)*$$/d" $(CHANGELOG)
@sed -r -i -e 's,$($@_pattern),$($@_replace),e' $(CHANGELOG)
# Put all necessary sources in the source directory
sources: $(SRC_TAR_GZ) $(CHANGELOG) $(RPMBUILD)
# Build the RPM spec file to embed in the .src.rpm file for a specific version
$(SPEC): $(SPEC_RPM) $(RPMBUILD)
@cp $< $@
@sed -i -e "s/%{?_build_version}/$(VERSION)/" $@
# rpmbuild targets
rpmbuild: $(SPEC) sources $(RPMBUILD)
rpmbuild-source: rpmbuild
@rpmbuild -bs --define "_topdir $(RPMBUILD)" $(SPEC)
rpmbuild-binary: rpmbuild
@rpmbuild -bb --define "_topdir $(RPMBUILD)" $(SPEC)
rpmbuild-all: rpmbuild
@rpmbuild -ba --define "_topdir $(RPMBUILD)" $(SPEC)
rpmbuild-clean:
@rm -rf $(RPMBUILD)
.PHONY: srpm sources $(SRC_TAR_GZ) $(SRC_TAR) $(CHANGELOG) $(SPEC)
general-cores-v1.1.1/doc/ 0000775 0000000 0000000 00000000000 13727622346 0015207 5 ustar 00root root 0000000 0000000 general-cores-v1.1.1/doc/Makefile 0000664 0000000 0000000 00000002221 13727622346 0016644 0 ustar 00root root 0000000 0000000 #
# Makefile for the documentation directory
#
# Copyright 1994,2000,2010,2011 Alessandro Rubini
#
#################
# There is not basenames here, all *.in are considered input
INPUT = general-cores.in
TEXI = $(INPUT:.in=.texi)
INFO = $(INPUT:.in=.info)
HTML = $(INPUT:.in=.html)
TXT = $(INPUT:.in=.txt)
PDF = $(INPUT:.in=.pdf)
ALL = $(TXT) $(PDF)
MAKEINFO ?= makeinfo
%.texi: %.in
@rm -f $@
sed -f ./infofilter $< > $@
emacs -batch --no-site-file -l fixinfo $@
chmod -w $@
#%.info: %.texi
# $(MAKEINFO) $< -o $@
#%.html: %.texi
# $(MAKEINFO) --html --no-split -o $@ $<
%.txt: %.texi
$(MAKEINFO) --no-headers $< > $@
%.pdf: %.texi
texi2pdf --batch $<
##############################################
.PHONY: all images check terse clean install
.INTERMEDIATE: $(TEXI)
all: images $(ALL)
$(MAKE) terse
$(MAKE) -C gc_i2c_slave
$(MAKE) -C wb_i2c_bridge
$(MAKE) -C wb_xil_multiboot
images::
if [ -d images ]; then $(MAKE) -C images || exit 1; fi
check: _err.ps
gs -sDEVICE=linux -r320x200x16 $<
terse:
for n in cp fn ky pg toc tp vr aux log; do rm -f *.$$n; done
rm -f *~
clean: terse
rm -f $(ALL) $(TEXI)
install:
general-cores-v1.1.1/doc/drawings/ 0000775 0000000 0000000 00000000000 13727622346 0017025 5 ustar 00root root 0000000 0000000 general-cores-v1.1.1/doc/drawings/vic_state.eps 0000664 0000000 0000000 00000750215 13727622346 0021531 0 ustar 00root root 0000000 0000000 %!PS-Adobe-3.0 EPSF-3.0
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{@fill}stopped{@ifl}{exit}ifelse}bind loop setflat}bd/@eofill/eofill ld/eofill
{currentflat{{@eofill}stopped{@ifl}{exit}ifelse}bind loop setflat}bd/@clip
/clip ld/clip{currentflat{{@clip}stopped{@ifl}{exit}ifelse}bind loop setflat}
bd/@eoclip/eoclip ld/eoclip{currentflat{{@eoclip}stopped{@ifl}{exit}ifelse}
bind loop setflat}bd/@stroke/stroke ld/stroke{currentflat{{@stroke}stopped
{@ifl}{exit}ifelse}bind loop setflat}bd}if L2?{/@ssa{true setstrokeadjust}bd}{
/@ssa{}bd}ifelse/d/setdash ld/j/setlinejoin ld/J/setlinecap ld/M/setmiterlimit
ld/w/setlinewidth ld/O{/$o xd}bd/R{/$O xd}bd/W/eoclip ld/c/curveto ld/C/c ld/l
/lineto ld/L/l ld/rl/rlineto ld/m/moveto ld/n/newpath ld/N/newpath ld/P{11 rp}
bd/u{}bd/U{}bd/A{pop}bd/q/@gs ld/Q/@gr ld/&{}bd/@j{@sv @np}bd/@J{@rs}bd/g{1
exch sub/$k xd/$c 0 def/$m 0 def/$y 0 def/$t 1 def/$n _ def/$fil 0 def}bd/G{1
sub neg/$K xd _ 1 0 0 0/$C xd/$M xd/$Y xd/$T xd/$N xd}bd/k{1 index type
/stringtype eq{/$t xd/$n xd}{/$t 0 def/$n _ def}ifelse/$k xd/$y xd/$m xd/$c xd
/$fil 0 def}bd/K{1 index type/stringtype eq{/$T xd/$N xd}{/$T 0 def/$N _ def}
ifelse/$K xd/$Y xd/$M xd/$C xd}bd/x/k ld/X/K ld/sf{1 index type/stringtype eq{
/s1t xd/s1n xd}{/s1t 0 def/s1n _ def}ifelse/s1k xd/s1y xd/s1m xd/s1c xd}bd/i{
dup 0 ne{setflat}{pop}ifelse}bd/v{4 -2 roll 2 copy 6 -2 roll c}bd/V/v ld/y{2
copy c}bd/Y/y ld/@w{matrix rotate/$ptm xd matrix scale $ptm dup concatmatrix
/$ptm xd 1 eq{$ptm exch dup concatmatrix/$ptm xd}if 1 w}bd/@g{1 eq dup/$sdf xd
{/$scp xd/$sca xd/$scf xd}if}bd/@G{1 eq dup/$SDF xd{/$SCP xd/$SCA xd/$SCF xd}
if}bd/@D{2 index 0 eq{$dsf 3 1 roll 4 -1 roll pop}if 3 copy exch $Scra add exch
load SetScr/$dsp xd/$dsa xd/$dsf xd}bd/$ngx{$SDF{$SCF SepMode_5 0 eq{$SCA}
{$dsa}ifelse $SCP @ss}if}bd/@MN{2 copy le{pop}{exch pop}ifelse}bd/@MX{2 copy ge
{pop}{exch pop}ifelse}bd/InRange{3 -1 roll @MN @MX}bd/@sqr{dup 0 rl dup 0 exch
rl neg 0 rl @cp}bd/currentscale{1 0 dtransform matrix defaultmatrix idtransform
dup mul exch dup mul add sqrt 0 1 dtransform matrix defaultmatrix idtransform
dup mul exch dup mul add sqrt}bd/@unscale{}bd/wDstChck{2 1 roll dup 3 -1 roll
eq{1 add}if}bd/@dot{dup mul exch dup mul add 1 exch sub}bd/@lin{exch pop abs 1
exch sub}bd/cmyk2rgb{3{dup 5 -1 roll add 1 exch sub dup 0 lt{pop 0}if exch}
repeat pop}bd/rgb2cmyk{3{1 exch sub 3 1 roll}repeat 3 copy @MN @MN 3{dup 5 -1
roll sub neg exch}repeat}bd/rgb2g{2 index .299 mul 2 index .587 mul add 1 index
.114 mul add 4 1 roll pop pop pop}bd/WaldoColor_5 where{pop}{/SetRgb
/setrgbcolor ld/GetRgb/currentrgbcolor ld/SetGry/setgray ld/GetGry/currentgray
ld/SetRgb2 systemdict/setrgbcolor get def/GetRgb2 systemdict/currentrgbcolor
get def/SetHsb systemdict/sethsbcolor get def/GetHsb systemdict
/currenthsbcolor get def/rgb2hsb{SetRgb2 GetHsb}bd/hsb2rgb{3 -1 roll dup floor
sub 3 1 roll SetHsb GetRgb2}bd/setcmykcolor where{pop/LumSepsDict where{pop
/SetCmyk_5{LumSepsDict/setcmykcolor get exec}def}{/AldusSepsDict where{pop
/SetCmyk_5{AldusSepsDict/setcmykcolor get exec}def}{/SetCmyk_5/setcmykcolor ld
}ifelse}ifelse}{/SetCmyk_5{cmyk2rgb SetRgb}bd}ifelse/currentcmykcolor where{
pop/GetCmyk/currentcmykcolor ld}{/GetCmyk{GetRgb rgb2cmyk}bd}ifelse
/setoverprint where{pop}{/setoverprint{/$op xd}bd}ifelse/currentoverprint where
{pop}{/currentoverprint{$op}bd}ifelse/@tc_5{5 -1 roll dup 1 ge{pop}{4{dup 6 -1
roll mul exch}repeat pop}ifelse}bd/@trp{exch pop 5 1 roll @tc_5}bd
/setprocesscolor_5{SepMode_5 0 eq{SetCmyk_5}{0 4 $ink_5 sub index exch pop 5 1
roll pop pop pop pop SepsColor true eq{$ink_5 3 gt{1 sub neg SetGry}{0 0 0 4
$ink_5 roll SetCmyk_5}ifelse}{1 sub neg SetGry}ifelse}ifelse}bd
/findcmykcustomcolor where{pop}{/findcmykcustomcolor{5 array astore}bd}ifelse
/Corelsetcustomcolor_exists false def/setcustomcolor where{pop
/Corelsetcustomcolor_exists true def}if CorelIsSeps true eq CorelIsInRIPSeps
false eq and{/Corelsetcustomcolor_exists false def}if
Corelsetcustomcolor_exists false eq{/setcustomcolor{exch aload pop SepMode_5 0
eq{pop @tc_5 setprocesscolor_5}{CurrentInkName_5 eq{4 index}{0}ifelse 6 1 roll
5 rp 1 sub neg SetGry}ifelse}bd}if/@scc_5{dup type/booleantype eq{dup
currentoverprint ne{setoverprint}{pop}ifelse}{1 eq setoverprint}ifelse dup _ eq
{pop setprocesscolor_5 pop}{findcmykcustomcolor exch setcustomcolor}ifelse
SepMode_5 0 eq{true}{GetGry 1 eq currentoverprint and not}ifelse}bd/colorimage
where{pop/ColorImage{colorimage}def}{/ColorImage{/ncolors xd/$multi xd $multi
true eq{ncolors 3 eq{/daqB xd/daqG xd/daqR xd pop pop exch pop abs{daqR pop
daqG pop daqB pop}repeat}{/daqK xd/daqY xd/daqM xd/daqC xd pop pop exch pop abs
{daqC pop daqM pop daqY pop daqK pop}repeat}ifelse}{/dataaq xd{dataaq ncolors
dup 3 eq{/$dat xd 0 1 $dat length 3 div 1 sub{dup 3 mul $dat 1 index get 255
div $dat 2 index 1 add get 255 div $dat 3 index 2 add get 255 div rgb2g 255 mul
cvi exch pop $dat 3 1 roll put}for $dat 0 $dat length 3 idiv getinterval pop}{
4 eq{/$dat xd 0 1 $dat length 4 div 1 sub{dup 4 mul $dat 1 index get 255 div
$dat 2 index 1 add get 255 div $dat 3 index 2 add get 255 div $dat 4 index 3
add get 255 div cmyk2rgb rgb2g 255 mul cvi exch pop $dat 3 1 roll put}for $dat
0 $dat length ncolors idiv getinterval}if}ifelse}image}ifelse}bd}ifelse
/setcmykcolor{1 5 1 roll _ currentoverprint @scc_5/$ffpnt xd}bd
/currentcmykcolor{GetCmyk}bd/setrgbcolor{rgb2cmyk setcmykcolor}bd
/currentrgbcolor{currentcmykcolor cmyk2rgb}bd/sethsbcolor{hsb2rgb setrgbcolor}
bd/currenthsbcolor{currentrgbcolor rgb2hsb}bd/setgray{dup dup setrgbcolor}bd
/currentgray{currentrgbcolor rgb2g}bd/InsideDCS false def/IMAGE/image ld/image
{InsideDCS{IMAGE}{/EPSDict where{pop SepMode_5 0 eq{IMAGE}{dup type/dicttype eq
{dup/ImageType get 1 ne{IMAGE}{dup dup/BitsPerComponent get 8 eq exch
/BitsPerComponent get 1 eq or currentcolorspace 0 get/DeviceGray eq and{
CurrentInkName_5(Black)eq{IMAGE}{dup/DataSource get/TCC xd/Height get abs{TCC
pop}repeat}ifelse}{IMAGE}ifelse}ifelse}{2 index 1 ne{CurrentInkName_5(Black)eq
{IMAGE}{/TCC xd pop pop exch pop abs{TCC pop}repeat}ifelse}{IMAGE}ifelse}
ifelse}ifelse}{IMAGE}ifelse}ifelse}bd}ifelse/WaldoColor_5 true def/$fm 0 def
/wfill{1 $fm eq{fill}{eofill}ifelse}bd/@Pf{@sv SepMode_5 0 eq $Psc 0 ne or
$ink_5 3 eq or{0 J 0 j[]0 d $t $c $m $y $k $n $o @scc_5 pop $ctm setmatrix 72
1000 div dup matrix scale dup concat dup Bburx exch Bbury exch itransform
ceiling cvi/Bbury xd ceiling cvi/Bburx xd Bbllx exch Bblly exch itransform
floor cvi/Bblly xd floor cvi/Bbllx xd $Prm aload pop $Psn load exec}{1 SetGry
wfill}ifelse @rs @np}bd/F{matrix currentmatrix $sdf{$scf $sca $scp @ss}if $fil
1 eq{CorelPtrnDoFill}{$fil 2 eq{@ff}{$fil 3 eq{@Pf}{$fil 4 eq
{CorelShfillDoFill}{$t $c $m $y $k $n $o @scc_5{wfill}{@np}ifelse}ifelse}
ifelse}ifelse}ifelse $sdf{$dsf $dsa $dsp @ss}if setmatrix}bd/f{@cp F}bd/S{
matrix currentmatrix $ctm setmatrix $SDF{$SCF $SCA $SCP @ss}if $T $C $M $Y $K
$N $O @scc_5{matrix currentmatrix $ptm concat stroke setmatrix}{@np}ifelse $SDF
{$dsf $dsa $dsp @ss}if setmatrix}bd/s{@cp S}bd/B{@gs F @gr S}bd/b{@cp B}bd/_E{
5 array astore exch cvlit xd}bd/@cc{currentfile $dat readhexstring pop}bd/@sm{
/$ctm $ctm currentmatrix def}bd/@E{/Bbury xd/Bburx xd/Bblly xd/Bbllx xd}bd/@c{
@cp}bd/@P{/$fil 3 def/$Psn xd/$Psc xd array astore/$Prm xd}bd/tcc{@cc}def/@B{
@gs S @gr F}bd/@b{@cp @B}bd/@sep{CurrentInkName_5(Composite)eq{/$ink_5 -1 def}
{CurrentInkName_5(Cyan)eq{/$ink_5 0 def}{CurrentInkName_5(Magenta)eq{/$ink_5 1
def}{CurrentInkName_5(Yellow)eq{/$ink_5 2 def}{CurrentInkName_5(Black)eq
{/$ink_5 3 def}{/$ink_5 4 def}ifelse}ifelse}ifelse}ifelse}ifelse}bd/@whi{@gs
-72000 dup m -72000 72000 l 72000 dup l 72000 -72000 l @cp 1 SetGry fill @gr}
bd/@neg{[{1 exch sub}/exec cvx currenttransfer/exec cvx]cvx settransfer @whi}
bd/deflevel 0 def/@sax{/deflevel deflevel 1 add def}bd/@eax{/deflevel deflevel
dup 0 gt{1 sub}if def deflevel 0 gt{/eax load}{eax}ifelse}bd/eax{{exec}forall}
bd/@rax{deflevel 0 eq{@rs @sv}if}bd systemdict/pdfmark known not{/pdfmark
/cleartomark ld}if/wclip{1 $fm eq{clip}{eoclip}ifelse}bd
% Copyright (c)1992-2003 Corel Corporation
% All rights reserved. v12 r0.0
/z{exch findfont exch scalefont setfont}bd/ZB{9 dict dup begin 4 1 roll
/FontType 3 def/FontMatrix xd/FontBBox xd/Encoding 256 array def 0 1 255{
Encoding exch/.notdef put}for/CharStrings 256 dict def CharStrings/.notdef{}
put/Metrics 256 dict def Metrics/.notdef 3 -1 roll put/BuildChar{exch dup
/$char exch/Encoding get 3 index get def dup/Metrics get $char get aload pop
setcachedevice begin Encoding exch get CharStrings exch get end exec}def end
definefont pop}bd/ZBAddChar{findfont begin dup 4 1 roll dup 6 1 roll Encoding 3
1 roll put CharStrings 3 1 roll put Metrics 3 1 roll put end}bd/Z{findfont dup
maxlength 2 add dict exch dup{1 index/FID ne{3 index 3 1 roll put}{pop pop}
ifelse}forall pop dup dup/Encoding get 256 array copy dup/$fe xd/Encoding exch
put dup/Fontname 3 index put 3 -1 roll dup length 0 ne{0 exch{dup type 0 type
eq{exch pop}{$fe exch 2 index exch put 1 add}ifelse}forall pop}if dup 256 dict
dup/$met xd/Metrics exch put dup/FontMatrix get 0 get 1000 mul 1 exch div 3
index length 256 eq{0 1 255{dup $fe exch get dup/.notdef eq{pop pop}{5 index 3
-1 roll get 2 index mul $met 3 1 roll put}ifelse}for}if pop definefont pop pop
}bd/CorelIsValidCharpath{pathbbox 3 -1 roll sub abs 0.5 ge 3 1 roll sub abs 0.5
ge and}bd/@ftx{{currentpoint 3 -1 roll(0)dup 3 -1 roll 0 exch put dup @gs true
charpath $ctm setmatrix CorelIsValidCharpath{@@txt}if @gr @np stringwidth pop 3
-1 roll add exch m}forall}bd/@ft{matrix currentmatrix exch $sdf{$scf $sca $scp
@ss}if $fil 1 eq{/@@txt/@pf ld @ftx}{$fil 2 eq{/@@txt/@ff ld @ftx}{$fil 3 eq
{/@@txt/@Pf ld @ftx}{$fil 4 eq{/@@txt/CorelShfillDoFill ld @ftx}{$t $c $m $y $k
$n $o @scc_5{show}{pop}ifelse}ifelse}ifelse}ifelse}ifelse $sdf{$dsf $dsa $dsp
@ss}if setmatrix}bd/@st{matrix currentmatrix exch $SDF{$SCF $SCA $SCP @ss}if $T
$C $M $Y $K $N $O @scc_5{{currentpoint 3 -1 roll(0)dup 3 -1 roll 0 exch put dup
@gs true charpath $ctm setmatrix $ptm concat stroke @gr @np stringwidth pop 3
-1 roll add exch m}forall}{pop}ifelse $SDF{$dsf $dsa $dsp @ss}if setmatrix}bd
/@te{@ft}bd/@tr{@st}bd/@ta{dup @gs @ft @gr @st}bd/@t@a{dup @gs @st @gr @ft}bd
/@tm{@sm concat}bd/e{/t{@te}def}bd/r{/t{@tr}def}bd/o{/t{pop}def}bd/a{/t{@ta}
def}bd/@a{/t{@t@a}def}bd/t{@te}def/T{@np $ctm setmatrix/$ttm matrix def}bd/ddt
{t}def/@t{/$stm $stm currentmatrix def 3 1 roll m $ttm concat ddt $stm
setmatrix}bd/@n{/$ttm exch matrix rotate def}bd/@s{}bd/@l{}bd/_lineorientation
0 def/_bitfont null def/_bitlobyte 0 def/_bitkey null def/_bithibyte 0 def
% Copyright (c)1992-2003 Corel Corporation
% All rights reserved. v12 r0.0
/@ii{concat 3 index 3 index m 3 index 1 index l 2 copy l 1 index 3 index l 3
index 3 index l clip pop pop pop pop}bd/@i{@sm @gs @ii 6 index 1 ne{/$frg true
def pop pop}{1 eq{s1t s1c s1m s1y s1k s1n $O @scc_5/$frg xd}{/$frg false def}
ifelse 1 eq{@gs $ctm setmatrix F @gr}if}ifelse @np/$ury xd/$urx xd/$lly xd
/$llx xd/$bts xd/$hei xd/$wid xd/$dat $wid $bts mul 8 div ceiling cvi string
def $bkg $frg or{$SDF{$SCF $SCA $SCP @ss}if $llx $lly Tl $urx $llx sub $ury
$lly sub scale $bkg{$t $c $m $y $k $n $o @scc_5 pop}if $wid $hei abs $bts 1 eq
{$bkg}{$bts}ifelse[$wid 0 0 $hei neg 0 $hei 0 gt{$hei}{0}ifelse]/tcc load $bts
1 eq{imagemask}{image}ifelse $SDF{$dsf $dsa $dsp @ss}if}{$hei abs{tcc pop}
repeat}ifelse @gr $ctm setmatrix}bd/@I{@sm @gs @ii @np/$ury xd/$urx xd/$lly xd
/$llx xd/$ncl xd/$bts xd/$hei xd/$wid xd $ngx $llx $lly Tl $urx $llx sub $ury
$lly sub scale $wid $hei abs $bts[$wid 0 0 $hei neg 0 $hei 0 gt{$hei}{0}ifelse
]$msimage false eq $ncl 1 eq or{/$dat $wid $bts mul $ncl mul 8 div ceiling cvi
string def/@cc load false $ncl ColorImage}{$wid $bts mul 8 div ceiling cvi $ncl
3 eq{dup dup/$dat1 exch string def/$dat2 exch string def/$dat3 exch string def
/@cc1 load/@cc2 load/@cc3 load}{dup dup dup/$dat1 exch string def/$dat2 exch
string def/$dat3 exch string def/$dat4 exch string def/@cc1 load/@cc2 load
/@cc3 load/@cc4 load}ifelse true $ncl ColorImage}ifelse $SDF{$dsf $dsa $dsp
@ss}if @gr $ctm setmatrix}bd/@cc1{currentfile $dat1 readhexstring pop}bd/@cc2{
currentfile $dat2 readhexstring pop}bd/@cc3{currentfile $dat3 readhexstring pop
}bd/@cc4{currentfile $dat4 readhexstring pop}bd/$msimage false def/COMP 0 def
/MaskedImage false def L2?{/@I_2{@sm @gs @ii @np/$ury xd/$urx xd/$lly xd/$llx
xd/$ncl xd/$bts xd/$hei xd/$wid xd/$dat $wid $bts mul $ncl mul 8 div ceiling
cvi string def $ngx $ncl 1 eq{/DeviceGray}{$ncl 3 eq{/DeviceRGB}{/DeviceCMYK}
ifelse}ifelse setcolorspace $llx $lly Tl $urx $llx sub $ury $lly sub scale 8
dict begin/ImageType 1 def/Width $wid def/Height $hei abs def/BitsPerComponent
$bts def/Decode $ncl 1 eq{[0 1]}{$ncl 3 eq{[0 1 0 1 0 1]}{[0 1 0 1 0 1 0 1]}
ifelse}ifelse def/ImageMatrix[$wid 0 0 $hei neg 0 $hei 0 gt{$hei}{0}ifelse]def
/DataSource currentfile/ASCII85Decode filter COMP 1 eq{/DCTDecode filter}{COMP
2 eq{/RunLengthDecode filter}if}ifelse def currentdict end image $SDF{$dsf $dsa
$dsp @ss}if @gr $ctm setmatrix}bd}{/@I_2{}bd}ifelse/@I_3{@sm @gs @ii @np/$ury
xd/$urx xd/$lly xd/$llx xd/$ncl xd/$bts xd/$hei xd/$wid xd/$dat $wid $bts mul
$ncl mul 8 div ceiling cvi string def $ngx $ncl 1 eq{/DeviceGray}{$ncl 3 eq
{/DeviceRGB}{/DeviceCMYK}ifelse}ifelse setcolorspace $llx $lly Tl $urx $llx sub
$ury $lly sub scale/ImageDataDict 8 dict def ImageDataDict begin/ImageType 1
def/Width $wid def/Height $hei abs def/BitsPerComponent $bts def/Decode $ncl 1
eq{[0 1]}{$ncl 3 eq{[0 1 0 1 0 1]}{[0 1 0 1 0 1 0 1]}ifelse}ifelse def
/ImageMatrix[$wid 0 0 $hei neg 0 $hei 0 gt{$hei}{0}ifelse]def/DataSource
currentfile/ASCII85Decode filter COMP 1 eq{/DCTDecode filter}{COMP 2 eq{
/RunLengthDecode filter}if}ifelse def end/MaskedImageDict 7 dict def
MaskedImageDict begin/ImageType 3 def/InterleaveType 3 def/MaskDict
ImageMaskDict def/DataDict ImageDataDict def end MaskedImageDict image $SDF
{$dsf $dsa $dsp @ss}if @gr $ctm setmatrix}bd/@SetMask{/$mbts xd/$mhei xd/$mwid
xd/ImageMaskDict 8 dict def ImageMaskDict begin/ImageType 1 def/Width $mwid def
/Height $mhei abs def/BitsPerComponent $mbts def/DataSource maskstream def
/ImageMatrix[$mwid 0 0 $mhei neg 0 $mhei 0 gt{$mhei}{0}ifelse]def/Decode[1 0]
def end}bd/@daq{dup type/arraytype eq{{}forall}if}bd/@BMP{/@cc xd UseLevel 3 eq
MaskedImage true eq and{7 -2 roll pop pop @I_3}{12 index 1 gt UseLevel 2 eq
UseLevel 3 eq or and{7 -2 roll pop pop @I_2}{11 index 1 eq{12 -1 roll pop @i}{
7 -2 roll pop pop @I}ifelse}ifelse}ifelse}bd
end
%%EndResource
%%EndProlog
%%BeginSetup
wCorel12Dict begin
@BeginSysCorelDict
2.6131 setmiterlimit
1.00 setflat
/$fst 128 def
%%EndSetup
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%%BeginPageSetup
@sv
@sm
@sv
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0 0.50003 0.50003 0.00000 @w
/$fm 0 def
265.96743 449.09631 m
324.61625 428.56923 L
265.96743 408.04214 L
207.31861 428.56923 L
265.96743 449.09631 L
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@j
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263.17531 498.78935 L
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@J
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/$fm 0 def
266.18910 470.19770 m
266.18910 453.74428 L
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@j
0.00 0.00 0.00 1.00 K
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268.82391 454.15956 m
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@rax %Note: Object
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/$fm 0 def
150.59565 578.83720 m
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380.86469 514.23704 L
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@rax %Note: Object
194.00031 470.34595 339.36491 494.00220 @E
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@rax %Note: Object
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