- Mar 20, 2018
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Dimitris Lampridis authored
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- Mar 19, 2018
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Dimitris Lampridis authored
For the few peripherals where it was being used (eg. uart, spi, etc) the output port has been renamed to "int_o". The only peripheral that was not touched is "wb_eic.vhd", because this one is being used by wbgen, and it would require users to update their wbgen tool as well. So, until a new tool is introduced, wbgen-generated interrupt controllers will have an output port called wb_int_o".
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- Mar 09, 2018
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Dimitris Lampridis authored
This reverts commit 49afba43. This change was introduced in the masterFIP branch, but it can break many existing designs, so it is reverted.
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- Dec 14, 2017
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Maciej Lipinski authored
the wishbone package In wishbone_pkg.vhd, the new g_sdb_name generic was added to xwb_crossbar instead of xwb_sdb_crossbar. Fixed
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- Dec 13, 2017
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- sdb_rom: add parameter g_sdb_name - xwb_sdb_crossbar: add parameter g_sdb_name - wishbone_pkg: f_string_fix_len add parameter justify_right - wishbone_pkg: f_sdb_auto_device add parameter name - wishbone_pkg: f_sdb_auto_bridge add parameter name
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Grzegorz Daniluk authored
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- Feb 17, 2017
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Evangelia Gousiou authored
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- Feb 14, 2017
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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- Oct 27, 2016
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Dimitris Lampridis authored
This was due to a bug in the f_string2bits() which took the commit ID as a string argument, assuming that the character array of the string is (32 downto 1), while in fact the commit_id is a string(1 to 32). f_string2bits() is now more resilient, it works with both "up" and "downto" string arguments, by checking the "ascending" attribute of the string type.
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- Oct 17, 2016
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Mathias Kreider authored
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- Sep 27, 2016
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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- Apr 22, 2016
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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- Apr 21, 2016
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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- Mar 30, 2016
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Wesley W. Terpstra authored
The subrange type might not be known in this context. Fixes: wishbone_pkg.vhd:1379:26: object subtype is not locally static
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Wesley W. Terpstra authored
Variable lengths might change; standard forbids length in a loop. Fixes: wishbone_pkg.vhd:1576:18: universal integer bound must be numeric literal or attribute wishbone_pkg.vhd:1613:18: universal integer bound must be numeric literal or attribute wishbone_pkg.vhd:1734:30: universal integer bound must be numeric literal or attribute wishbone_pkg.vhd:1771:16: universal integer bound must be numeric literal or attribute wishbone_pkg.vhd:1806:16: universal integer bound must be numeric literal or attribute wishbone_pkg.vhd:1817:16: universal integer bound must be numeric literal or attribute
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- Nov 18, 2015
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Tomasz Wlostowski authored
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- Nov 16, 2015
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Mathias Kreider authored
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- Feb 24, 2015
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Wesley W. Terpstra authored
Sometimes a master needs to stop the flow of acks.
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- Feb 17, 2015
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Cesar Prados authored
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- Aug 04, 2014
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Grzegorz Daniluk authored
Now wb_spi has generic parameters to configure registers length and number of spi slaves. Reason for that is to keep default configuration in the repository but also allow to adjust settings for WR Switch synthesis (and save resources).
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Grzegorz Daniluk authored
The values used in WR Switch software fit in 8-bit registers so using 16-bits in HDL was waste of resources.
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Grzegorz Daniluk authored
Commit adds new WB register(IFS) that selects to which I2C interface master should talk to. All other interfaces are then hold in idle state. IFS contains also BUSY bit that is written only by host and marks that I2C Master is currently in use and cannot be switched to another I2C interface. Host must clear BUSY flag after the interaction with I2C interface is finished.
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- Jul 31, 2014
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Theodor-Adrian Stana authored
This is done to better reflect the interface of the module (structured Wishbone). The documentation of the module is also changed in this respect.
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Theodor-Adrian Stana authored
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- May 20, 2014
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Matthieu Cattin authored
It was causing the simulation to fail with designs containing a xwb_register_link component.
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- Apr 30, 2014
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Cesar Prados authored
the sdb address of the wb crossbar. The sdb address is store in a CSR, 0xb, and it can be retrieved from the firmware using an asm macro call.
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- Apr 25, 2014
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Matthieu Cattin authored
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- Apr 17, 2014
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Wesley W. Terpstra authored
Using the volatile configuration register to configure a flash chip is a bad idea. The problem is that if the FPGA is reset, the flash may be in a state inconsistent with what the FPGA requires to boot. The correct solution is to configure the non-volatile configuration register on the chip to what the FPGA expects on power-on. Then use these same settings inside the flash core. Going this route makes it necessary for software to be able to set the non-volatile configuration register. Rather than making the core even more complicated than it is, I have elected to add a FIFO which software can fill to issue custom SPI commands. Since erase can only be done from software anyway, I removed this code and let erase use the custom command FIFO.
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- Mar 28, 2014
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Theodor-Adrian Stana authored
This is done by adding a generic to the entity, which is connected directly to the gc_fsm_watchdog component instantiated within the wb_i2c_bridge. The user should calculate the appropriate watchdog timeout value and set it via this generic. The instantiation template in the wishbone_pkg is also updated. Signed-off-by:
Theodor Stana <t.stana@cern.ch>
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- Feb 27, 2014
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Mathias Kreider authored
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- Feb 06, 2014
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This change is necessary for network control/monitor tool in order to read the GUI command output. The GUI command output can not be stored into a 1024 bytes fifo.
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