Theodor-Adrian Stana authored 11 years ago and Tomasz Wlostowski committed 11 years ago

- gc_i2c_slave     -- generic I2C slave to be used with a processor or tied to a
                      Wishbone interface
- gc_glitch_filter -- glitch filter with selectable number of taps
- wb_i2c_bridge    -- I2C bridge implementing the protocol defined with ELMA
                      for monitoring VME crates
- wb_xil_multiboot -- module that accesses the Spartan-6 configuration logic
                      for reconfiguring the FPGA using MultiBoot

Doc files for each of these modules can be found in the doc/ folder.

Signed-off-by: Theodor Stana <t.stana@cern.ch>
Signed-off-by: Tomasz Włostowski <tomasz.wlostowski@cern.ch>

Conflicts:

	modules/wishbone/Manifest.py

Tomasz Wlostowski authored 13 years ago and Tomasz Wlostowski committed 13 years ago

Added:
- asynchronous SRAM bus -> Wishbone bridge (wb_async_bridge)
- Conmax interconnect (wb_conmax)
- GPIO port (wb_gpio_port)
- Very simple timer (wb_simple timer)
- Simple UART (wb_uart)
- Vectored Interrupt controller (wb_vic)
- Virtual UART (mmapped FIFO, wb_virtual_uart)
- wbgen2 core generator libraries (wbgen2)

Updated uses of the wishbone_pkg to use Tom's naming conventions.
Added Manifests for the new files.