c_status_time was one cycle longer than it should be!
this led to the arria5 requiring g_dummy_time-1 in c_vstatus_data
==> after fixing: must increase g_input_to_output_cycles on arria5

there was also a wrong calculation for s_wip with single-lane mode
it was working also by luck because WEL and WIP are usually set
together and are side-by-side, thus masking the c_status_time bug.

Matthieu Cattin authored 12 years ago and Tomasz Wlostowski committed 11 years ago

Supports sdb_repo_url and sdb_synthesis records.

sdb-crossbar: add support for meta-information records.
A new generic (g_info) is available to add an array of meta-inforamtion
records to the sdb rom.

sdb-crossbar: add boolean generic to use meta-information records.
Can't find out how to initialise an array with a null-range.

wishbone_pkg: add default value to meta-information generic.

sdb-crossbar: fix conditional constant declaration

sdb-crossbar: use a function to initialise number of info entries constant.

sdb-crossbar: fix syntax error in function.

wishbone_pkg: add embed/extract function for repo-url and synthesis records.

wishbone_pkg: Change some meta-info fields to string and add string manip functions.

wishbone_pkg: Change syn_commit_id type to string.

wishbone_pkg: Fix syntax error.

wishbone_pkg: Fix index bug in string manip functions.

wishbone_pkg: Fix range bug in string manip function.

wishbone_pkg: add integration record support.

sdb-crossbar: Fix range issue with meta-info records.

Conflicts:

	modules/wishbone/wishbone_pkg.vhd

In the past we used a generic to set the initial memory contents on altera.
Unfortunately, quartus compiles big generics slowly (read: hours).
Now we can load from a .mif file instead, which is much faster (seconds).
Thus, this old option is no longer needed.

According to Peter Jansweijer, Precision and Questasim had trouble
synthesizing the crossbar HDL. After tracking the problem down via
email, it appears that these tools cannot handle nested functions
correctly; they crash or fail when trying to access the parameters
of the lexically enclosing function.

Therefore, this patch just outright removes all nested functions.

Each clock domain needs a separate reset line.
However, one cannot reset only a single domain---that could cause inconsistency
at clock crossing boundaries.
This change splits reset lines per clock domain and centralizes generation.

to ensure stabilization.