Skip to content
Snippets Groups Projects
Commit 1f3d89d0 authored by Stefan Rauch's avatar Stefan Rauch
Browse files

arria2: updated pcie and clk networks

parent 1fd40beb
No related merge requests found
Hide whitespace changes
Inline Side-by-side
platform/altera/networks/arria2gx/dual_region.txt
+ 4
− 2
View file @ 1f3d89d0
......@@ -3,8 +3,11 @@
-- VERSION: WM1.0
-- MODULE: altclkctrl
--altclkctrl CBX_AUTO_BLACKBOX="ALL" CLOCK_TYPE="Dual-Regional Clock" DEVICE_FAMILY="Arria II GX" USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION="OFF" ena inclk outclk
--VERSION_BEGIN 13.0 cbx_altclkbuf 2013:06:12:18:03:33:SJ cbx_cycloneii 2013:06:12:18:03:33:SJ cbx_lpm_add_sub 2013:06:12:18:03:33:SJ cbx_lpm_compare 2013:06:12:18:03:33:SJ cbx_lpm_decode 2013:06:12:18:03:33:SJ cbx_lpm_mux 2013:06:12:18:03:33:SJ cbx_mgl 2013:06:12:18:33:59:SJ cbx_stratix 2013:06:12:18:03:33:SJ cbx_stratixii 2013:06:12:18:03:33:SJ cbx_stratixiii 2013:06:12:18:03:33:SJ cbx_stratixv 2013:06:12:18:03:33:SJ VERSION_END
--VERSION_BEGIN 16.0 cbx_altclkbuf 2016:05:25:18:37:14:SJ cbx_cycloneii 2016:05:25:18:37:14:SJ cbx_lpm_add_sub 2016:05:25:18:37:14:SJ cbx_lpm_compare 2016:05:25:18:37:14:SJ cbx_lpm_decode 2016:05:25:18:37:14:SJ cbx_lpm_mux 2016:05:25:18:37:14:SJ cbx_mgl 2016:05:25:19:47:45:SJ cbx_nadder 2016:05:25:18:37:14:SJ cbx_stratix 2016:05:25:18:37:14:SJ cbx_stratixii 2016:05:25:18:37:14:SJ cbx_stratixiii 2016:05:25:18:37:15:SJ cbx_stratixv 2016:05:25:18:37:15:SJ VERSION_END
-- ============================================================
-- CNX file retrieval info
......@@ -26,4 +29,3 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL dual_region.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL dual_region.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL dual_region_inst.vhd FALSE
-- Retrieval info: LIB_FILE: arriaii
platform/altera/networks/arria2gx/global_region.txt
+ 3
− 2
View file @ 1f3d89d0
......@@ -3,8 +3,10 @@
-- VERSION: WM1.0
-- MODULE: altclkctrl
--altclkctrl CBX_AUTO_BLACKBOX="ALL" CLOCK_TYPE="Global Clock" DEVICE_FAMILY="Arria II GX" USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION="OFF" ena inclk outclk
--VERSION_BEGIN 13.0 cbx_altclkbuf 2013:06:12:18:03:33:SJ cbx_cycloneii 2013:06:12:18:03:33:SJ cbx_lpm_add_sub 2013:06:12:18:03:33:SJ cbx_lpm_compare 2013:06:12:18:03:33:SJ cbx_lpm_decode 2013:06:12:18:03:33:SJ cbx_lpm_mux 2013:06:12:18:03:33:SJ cbx_mgl 2013:06:12:18:33:59:SJ cbx_stratix 2013:06:12:18:03:33:SJ cbx_stratixii 2013:06:12:18:03:33:SJ cbx_stratixiii 2013:06:12:18:03:33:SJ cbx_stratixv 2013:06:12:18:03:33:SJ VERSION_END
--VERSION_BEGIN 16.0 cbx_altclkbuf 2016:05:25:18:37:14:SJ cbx_cycloneii 2016:05:25:18:37:14:SJ cbx_lpm_add_sub 2016:05:25:18:37:14:SJ cbx_lpm_compare 2016:05:25:18:37:14:SJ cbx_lpm_decode 2016:05:25:18:37:14:SJ cbx_lpm_mux 2016:05:25:18:37:14:SJ cbx_mgl 2016:05:25:19:47:45:SJ cbx_nadder 2016:05:25:18:37:14:SJ cbx_stratix 2016:05:25:18:37:14:SJ cbx_stratixii 2016:05:25:18:37:14:SJ cbx_stratixiii 2016:05:25:18:37:15:SJ cbx_stratixv 2016:05:25:18:37:15:SJ VERSION_END
-- ============================================================
-- CNX file retrieval info
......@@ -26,4 +28,3 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL global_region.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL global_region.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL global_region_inst.vhd FALSE
-- Retrieval info: LIB_FILE: arriaii
platform/altera/networks/arria2gx/single_region.txt
+ 4
− 2
View file @ 1f3d89d0
......@@ -3,8 +3,11 @@
-- VERSION: WM1.0
-- MODULE: altclkctrl
--altclkctrl CBX_AUTO_BLACKBOX="ALL" CLOCK_TYPE="Regional Clock" DEVICE_FAMILY="Arria II GX" USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION="OFF" ena inclk outclk
--VERSION_BEGIN 13.0 cbx_altclkbuf 2013:06:12:18:03:33:SJ cbx_cycloneii 2013:06:12:18:03:33:SJ cbx_lpm_add_sub 2013:06:12:18:03:33:SJ cbx_lpm_compare 2013:06:12:18:03:33:SJ cbx_lpm_decode 2013:06:12:18:03:33:SJ cbx_lpm_mux 2013:06:12:18:03:33:SJ cbx_mgl 2013:06:12:18:33:59:SJ cbx_stratix 2013:06:12:18:03:33:SJ cbx_stratixii 2013:06:12:18:03:33:SJ cbx_stratixiii 2013:06:12:18:03:33:SJ cbx_stratixv 2013:06:12:18:03:33:SJ VERSION_END
--VERSION_BEGIN 16.0 cbx_altclkbuf 2016:05:25:18:37:14:SJ cbx_cycloneii 2016:05:25:18:37:14:SJ cbx_lpm_add_sub 2016:05:25:18:37:14:SJ cbx_lpm_compare 2016:05:25:18:37:14:SJ cbx_lpm_decode 2016:05:25:18:37:14:SJ cbx_lpm_mux 2016:05:25:18:37:14:SJ cbx_mgl 2016:05:25:19:47:45:SJ cbx_nadder 2016:05:25:18:37:14:SJ cbx_stratix 2016:05:25:18:37:14:SJ cbx_stratixii 2016:05:25:18:37:14:SJ cbx_stratixiii 2016:05:25:18:37:15:SJ cbx_stratixv 2016:05:25:18:37:15:SJ VERSION_END
-- ============================================================
-- CNX file retrieval info
......@@ -26,4 +29,3 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL single_region.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL single_region.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL single_region_inst.vhd FALSE
-- Retrieval info: LIB_FILE: arriaii
platform/altera/wb_pcie/arria2_pcie_hip.txt
+ 8
− 6
View file @ 1f3d89d0
-- megafunction wizard: %IP Compiler for PCI Express v13.1%
-- Retrieval info: <MEGACORE title="IP Compiler for PCI Express" version="13.1" build="162" iptb_version="1.3.0 Build 162" format_version="120" >
-- megafunction wizard: %IP Compiler for PCI Express v16.0%
-- Retrieval info: <?xml version="1.0"?>
-- Retrieval info: <MEGACORE title="IP Compiler for PCI Express" version="16.0" build="218" iptb_version="1.3.0 Build 218" format_version="120" >
-- Retrieval info: <NETLIST_SECTION class="altera.ipbu.flowbase.netlist.model.MVCModel" active_core="altpcie_hip_pipen1b" >
-- Retrieval info: <STATIC_SECTION>
-- Retrieval info: <PRIVATES>
......@@ -40,7 +42,6 @@
-- Retrieval info: <PRIVATE name = "actualBAR4Size" value="0" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "actualBAR5AvalonAddress" value="0" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "actualBAR5Size" value="0" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "allowedDeviceFamilies" value="[Arria II GX, Arria II GZ, Arria V, Cyclone III, Cyclone III LS, Cyclone IV E, Cyclone IV GX, Cyclone V]" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "altgx_generated" value="0" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "clockSource" value="N/A" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "contextState" value="NativeContext" type="STRING" enable="1" />
......@@ -148,7 +149,7 @@
-- Retrieval info: <PRIVATE name = "p_pcie_L1_exit_latency_separate_clock" value="&gt;64 us" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_advanced_error_int_num" value="0x00000000" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_alt2gxb" value="0" type="BOOLEAN" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_altgx_keyParameters_used" value="{p_pcie_enable_hip=1, p_pcie_number_of_lanes=x4, p_pcie_phy=Arria II GX, p_pcie_rate=Gen1 (2.5 Gbps), p_pcie_txrx_clock=100 MHz}" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_altgx_keyParameters_used" value="{p_pcie_enable_hip=1, p_pcie_number_of_lanes=x4, p_pcie_rate=Gen1 (2.5 Gbps), p_pcie_phy=Arria II GX, p_pcie_txrx_clock=100 MHz}" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_app_signal_interface" value="AvalonST" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_avalon_mm_lite" value="0" type="INTEGER" enable="1" />
-- Retrieval info: <PRIVATE name = "p_pcie_bar_size_bar_0" value="128 Bytes - 7 bits" type="STRING" enable="1" />
......@@ -376,8 +377,8 @@
-- Retrieval info: <PRIVATE name = "filename" value="arria2_pcie_hip_core.vhd" type="STRING" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "quartus_settings">
-- Retrieval info: <PRIVATE name = "DEVICE" value="EP2AGX125EF29C5" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "FAMILY" value="Arria II GX" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "WEB_BROWSER" value="/usr/bin/firefox" type="STRING" enable="1" />
-- Retrieval info: <PRIVATE name = "LICENSE_FILE" value="LM_LICENSE_FILE" type="STRING" enable="1" />
-- Retrieval info: </NAMESPACE>
-- Retrieval info: <NAMESPACE name = "serializer"/>
-- Retrieval info: </PRIVATES>
......@@ -387,3 +388,4 @@
-- Retrieval info: </STATIC_SECTION>
-- Retrieval info: </NETLIST_SECTION>
-- Retrieval info: </MEGACORE>
-- =========================================================
platform/altera/wb_pcie/arria2_pcie_reconf.txt
+ 7
− 4
View file @ 1f3d89d0
......@@ -3,12 +3,17 @@
-- VERSION: WM1.0
-- MODULE: alt2gxb_reconfig
--alt2gxb_reconfig BASE_PORT_WIDTH=1 CBX_AUTO_BLACKBOX="ALL" DEVICE_FAMILY="Arria II GX" ENABLE_BUF_CAL="TRUE" ENABLE_CHL_ADDR_FOR_ANALOG_CTRL="TRUE" NUMBER_OF_CHANNELS=1 NUMBER_OF_RECONFIG_PORTS=1 READ_BASE_PORT_WIDTH=1 RECONFIG_FROMGXB_WIDTH=17 RECONFIG_TOGXB_WIDTH=4 busy reconfig_clk reconfig_fromgxb reconfig_mode_sel reconfig_togxb
--VERSION_BEGIN 13.1 cbx_alt2gxb_reconfig 2013:10:17:04:07:49:SJ cbx_alt_cal 2013:10:17:04:07:49:SJ cbx_alt_dprio 2013:10:17:04:07:49:SJ cbx_altsyncram 2013:10:17:04:07:49:SJ cbx_cycloneii 2013:10:17:04:07:49:SJ cbx_lpm_add_sub 2013:10:17:04:07:49:SJ cbx_lpm_compare 2013:10:17:04:07:49:SJ cbx_lpm_counter 2013:10:17:04:07:49:SJ cbx_lpm_decode 2013:10:17:04:07:49:SJ cbx_lpm_mux 2013:10:17:04:07:49:SJ cbx_lpm_shiftreg 2013:10:17:04:07:49:SJ cbx_mgl 2013:10:17:04:34:36:SJ cbx_stratix 2013:10:17:04:07:49:SJ cbx_stratixii 2013:10:17:04:07:49:SJ cbx_stratixiii 2013:10:17:04:07:49:SJ cbx_stratixv 2013:10:17:04:07:49:SJ cbx_util_mgl 2013:10:17:04:07:49:SJ VERSION_END
--VERSION_BEGIN 16.0 cbx_alt2gxb_reconfig 2016:05:25:18:37:14:SJ cbx_alt_cal 2016:05:25:18:37:14:SJ cbx_alt_dprio 2016:05:25:18:37:14:SJ cbx_altera_syncram_nd_impl 2016:05:25:18:37:14:SJ cbx_altsyncram 2016:05:25:18:37:14:SJ cbx_cycloneii 2016:05:25:18:37:14:SJ cbx_lpm_add_sub 2016:05:25:18:37:14:SJ cbx_lpm_compare 2016:05:25:18:37:14:SJ cbx_lpm_counter 2016:05:25:18:37:14:SJ cbx_lpm_decode 2016:05:25:18:37:14:SJ cbx_lpm_mux 2016:05:25:18:37:14:SJ cbx_lpm_shiftreg 2016:05:25:18:37:14:SJ cbx_mgl 2016:05:25:19:47:45:SJ cbx_nadder 2016:05:25:18:37:14:SJ cbx_stratix 2016:05:25:18:37:14:SJ cbx_stratixii 2016:05:25:18:37:14:SJ cbx_stratixiii 2016:05:25:18:37:15:SJ cbx_stratixv 2016:05:25:18:37:15:SJ cbx_util_mgl 2016:05:25:18:37:14:SJ VERSION_END
--alt_dprio address_width=16 CBX_AUTO_BLACKBOX="ALL" device_family="Arria II GX" quad_address_width=9 address busy datain dataout dpclk dpriodisable dprioin dprioload dprioout quad_address rden reset wren wren_data
--VERSION_BEGIN 13.1 cbx_alt_dprio 2013:10:17:04:07:49:SJ cbx_cycloneii 2013:10:17:04:07:49:SJ cbx_lpm_add_sub 2013:10:17:04:07:49:SJ cbx_lpm_compare 2013:10:17:04:07:49:SJ cbx_lpm_counter 2013:10:17:04:07:49:SJ cbx_lpm_decode 2013:10:17:04:07:49:SJ cbx_lpm_shiftreg 2013:10:17:04:07:49:SJ cbx_mgl 2013:10:17:04:34:36:SJ cbx_stratix 2013:10:17:04:07:49:SJ cbx_stratixii 2013:10:17:04:07:49:SJ VERSION_END
--VERSION_BEGIN 16.0 cbx_alt_dprio 2016:05:25:18:37:14:SJ cbx_cycloneii 2016:05:25:18:37:14:SJ cbx_lpm_add_sub 2016:05:25:18:37:14:SJ cbx_lpm_compare 2016:05:25:18:37:14:SJ cbx_lpm_counter 2016:05:25:18:37:14:SJ cbx_lpm_decode 2016:05:25:18:37:14:SJ cbx_lpm_shiftreg 2016:05:25:18:37:14:SJ cbx_mgl 2016:05:25:19:47:45:SJ cbx_nadder 2016:05:25:18:37:14:SJ cbx_stratix 2016:05:25:18:37:14:SJ cbx_stratixii 2016:05:25:18:37:14:SJ VERSION_END
--synthesis_resources = lpm_compare 3 lpm_counter 1 lpm_decode 1 lut 1 reg 102
-- ============================================================
-- CNX file retrieval info
......@@ -44,5 +49,3 @@
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria2_pcie_reconf.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria2_pcie_reconf.bsf FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL arria2_pcie_reconf_inst.vhd FALSE
-- Retrieval info: LIB_FILE: altera_mf
-- Retrieval info: LIB_FILE: lpm
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment