This avoids sleeping in interrupt handlers.

Usually our cards are used in MSI mode. On older motherboards, they
can fall back to classic interrupt generation. However, then the
interrupt enable register in the card must be turned on.

Previously, the interrupt handler popped the data from the hardware.
To do this, it needed to lock the target buffers, guarded by a mutex.
Unfortunately, that can cause the interrupt handler to sleep! bad!

This patch moves the waitq and fasync structure to the wishbone structure
which is always present.  Then, the interrupt handler need only wake up any
threads blocked waiting for data.  The read/poll functions invoke the
processing of data from the hardware, instead.

The drivers were popping the slave request FIFO, whether it was empty or not.
This seemed safe since empty FIFOs do nothing when popped. However, if the
FIFO receives an element between the empty check and the pop, we might pop
an element without ever seeing it. Under load this led to lost interrupts.

API 1&2 were the same; merged.
API 0 renamed to 1