Commit bf1d3a92 authored by Adam Wujek's avatar Adam Wujek

doc: add memory maps to the PDF

Signed-off-by: 's avatarAdam Wujek <dev_public@wujek.eu>
parent bb31901e
...@@ -89,6 +89,11 @@ latex_documents = [ ...@@ -89,6 +89,11 @@ latex_documents = [
'manual'), 'manual'),
] ]
latex_elements = {
'passoptionstopackages': r'\PassOptionsToPackage{table}{xcolor}',
'preamble' : r'\definecolor{RoyalPurple}{cmyk}{1, 0.50, 0, 0}',
}
breathe_projects = { breathe_projects = {
"fmctdc-lib":"doxygen-lib-output/xml/", "fmctdc-lib":"doxygen-lib-output/xml/",
......
...@@ -30,9 +30,7 @@ the FMC-TDC-1NS-5CH modules. ...@@ -30,9 +30,7 @@ the FMC-TDC-1NS-5CH modules.
.. only:: latex .. only:: latex
.. warning:: .. include:: regs/fmc_tdc_mezzanine_mmap.rst
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/fmc_tdc_mezzanine_mmap.htm :file: regs/fmc_tdc_mezzanine_mmap.htm
...@@ -40,11 +38,9 @@ the FMC-TDC-1NS-5CH modules. ...@@ -40,11 +38,9 @@ the FMC-TDC-1NS-5CH modules.
One wire One wire
-------- --------
.. only:: latex .. raw:: latex
:file: regs/tdc_onewire_wb.tex
.. warning::
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/tdc_onewire_wb.html :file: regs/tdc_onewire_wb.html
...@@ -58,11 +54,8 @@ EIC ...@@ -58,11 +54,8 @@ EIC
--- ---
.. only:: latex .. raw:: latex
:file: regs/tdc_eic.tex
.. warning::
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/tdc_eic.html :file: regs/tdc_eic.html
...@@ -75,11 +68,8 @@ Not used. ...@@ -75,11 +68,8 @@ Not used.
Mem Mem
--- ---
.. only:: latex .. raw:: latex
:file: regs/timestamp_fifo_wb.tex
.. warning::
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/timestamp_fifo_wb.html :file: regs/timestamp_fifo_wb.html
...@@ -87,11 +77,8 @@ Mem ...@@ -87,11 +77,8 @@ Mem
Mem DMA Mem DMA
------- -------
.. only:: latex .. raw:: latex
:file: regs/tdc_buffer_control_regs.tex
.. warning::
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/tdc_buffer_control_regs.html :file: regs/tdc_buffer_control_regs.html
...@@ -99,11 +86,9 @@ Mem DMA ...@@ -99,11 +86,9 @@ Mem DMA
Mem DMA EIC Mem DMA EIC
----------- -----------
.. only:: latex .. raw:: latex
:file: regs/dma_eic.tex
.. warning::
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/dma_eic.html :file: regs/dma_eic.html
......
...@@ -17,12 +17,33 @@ HTML += tdc_eic.html ...@@ -17,12 +17,33 @@ HTML += tdc_eic.html
HTML += tdc_onewire_wb.html HTML += tdc_onewire_wb.html
HTML += timestamp_fifo_wb.html HTML += timestamp_fifo_wb.html
all: $(HTML) REST := spec_base_regs.rst
REST += svec_base_regs.rst
REST += svec_ref_fmc_tdc_mmap.rst
REST += spec_ref_fmc_tdc_mmap.rst
REST += fmc_tdc_mezzanine_mmap.rst
LATEX += dma_eic.tex
LATEX += fmc_tdc_direct_readout_slave.tex
LATEX += tdc_buffer_control_regs.tex
LATEX += tdc_eic.tex
LATEX += tdc_onewire_wb.tex
LATEX += timestamp_fifo_wb.tex
all: html latex rest
latex: $(LATEX)
html: $(HTML)
rest: $(REST)
.PHONY: clean .PHONY: clean
CHEBY_BUILD=(cd $(dir $<); ~/.local/bin/cheby -i $(notdir $<) --gen-doc --doc html) > $@ CHEBY_BUILD=(cd $(dir $<); ~/.local/bin/cheby -i $(notdir $<) --gen-doc --doc html) > $@
WBGEN2_BUILD=(wbgen2 -D $@ $<) CHEBY_BUILD_REST=(cd $(dir $<); ~/.local/bin/cheby -i $(notdir $<) --gen-doc --doc rest) > $@
WBGEN2_BUILD=(~/wr/tdc/wishbone-gen/wbgen2 -D $@ $<)
WBGEN2_BUILD_TEX=(~/wr/tdc/wishbone-gen/wbgen2 -f latex -D $@ $<)
fmc_tdc_mezzanine_mmap.htm: $(TOP_DIR)/hdl/cheby/fmc_tdc_mezzanine_mmap.cheby fmc_tdc_mezzanine_mmap.htm: $(TOP_DIR)/hdl/cheby/fmc_tdc_mezzanine_mmap.cheby
$(CHEBY_BUILD) $(CHEBY_BUILD)
...@@ -57,8 +78,41 @@ tdc_eic.html: $(TOP_DIR)/hdl/rtl/wbgen/tdc_eic.wb ...@@ -57,8 +78,41 @@ tdc_eic.html: $(TOP_DIR)/hdl/rtl/wbgen/tdc_eic.wb
tdc_onewire_wb.html: $(TOP_DIR)/hdl/rtl/wbgen/tdc_onewire_wb.wb tdc_onewire_wb.html: $(TOP_DIR)/hdl/rtl/wbgen/tdc_onewire_wb.wb
$(WBGEN2_BUILD) $(WBGEN2_BUILD)
timestamp_fifo_wb.html: $(TOP_DIR)/hdl/rtl/wbgen/timestamp_fifo_wb.wb fmc_tdc_mezzanine_mmap.rst: $(TOP_DIR)/hdl/cheby/fmc_tdc_mezzanine_mmap.cheby
$(WBGEN2_BUILD) $(CHEBY_BUILD_REST)
spec_ref_fmc_tdc_mmap.rst: $(TOP_DIR)/hdl/cheby/spec_ref_fmc_tdc_mmap.cheby
$(CHEBY_BUILD_REST)
svec_ref_fmc_tdc_mmap.rst: $(TOP_DIR)/hdl/cheby/svec_ref_fmc_tdc_mmap.cheby
$(CHEBY_BUILD_REST)
svec_base_regs.rst: $(TOP_DIR)/hdl/ip_cores/svec/hdl/rtl/svec_base_regs.cheby
$(CHEBY_BUILD_REST)
spec_base_regs.rst: $(TOP_DIR)/hdl/ip_cores/spec/hdl/rtl/spec_base_regs.cheby
$(CHEBY_BUILD_REST)
timestamp_fifo_wb.tex: $(TOP_DIR)/hdl/rtl/wbgen/timestamp_fifo_wb.wb
$(WBGEN2_BUILD_TEX)
dma_eic.tex: $(TOP_DIR)/hdl/rtl/wbgen/dma_eic.wb
$(WBGEN2_BUILD_TEX)
fmc_tdc_direct_readout_slave.tex: $(TOP_DIR)/hdl/rtl/wbgen/fmc_tdc_direct_readout_slave.wb
$(WBGEN2_BUILD_TEX)
tdc_buffer_control_regs.tex: $(TOP_DIR)/hdl/rtl/wbgen/tdc_buffer_control_regs.wb
$(WBGEN2_BUILD_TEX)
tdc_eic.tex: $(TOP_DIR)/hdl/rtl/wbgen/tdc_eic.wb
$(WBGEN2_BUILD_TEX)
tdc_onewire_wb.tex: $(TOP_DIR)/hdl/rtl/wbgen/tdc_onewire_wb.wb
$(WBGEN2_BUILD_TEX)
clean: clean:
@rm -f *.md *.rst *.htm *.html @rm -f *.rst *.htm *.html *.tex
...@@ -10,11 +10,10 @@ The memory map is divided in two parts: the :ref:`Carrier (SPEC) <SPEC base regs ...@@ -10,11 +10,10 @@ The memory map is divided in two parts: the :ref:`Carrier (SPEC) <SPEC base regs
all SPEC designs, and the :ref:`TDC <TDC base regs>` part specific to the all SPEC designs, and the :ref:`TDC <TDC base regs>` part specific to the
FMC-TDC-1NS-5CHA mezzanine. FMC-TDC-1NS-5CHA mezzanine.
.. only:: latex .. only:: latex
.. warning:: .. include:: regs/spec_ref_fmc_tdc_mmap.rst
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/spec_ref_fmc_tdc_mmap.htm :file: regs/spec_ref_fmc_tdc_mmap.htm
...@@ -26,9 +25,8 @@ SPEC base registers ...@@ -26,9 +25,8 @@ SPEC base registers
.. only:: latex .. only:: latex
.. warning:: .. include:: regs/spec_base_regs.rst
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/spec_base_regs.htm :file: regs/spec_base_regs.htm
......
...@@ -14,9 +14,7 @@ FMC-TDC-1NS-5CHA mezzanine. ...@@ -14,9 +14,7 @@ FMC-TDC-1NS-5CHA mezzanine.
.. only:: latex .. only:: latex
.. warning:: .. include:: regs/svec_ref_fmc_tdc_mmap.rst
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/svec_ref_fmc_tdc_mmap.htm :file: regs/svec_ref_fmc_tdc_mmap.htm
...@@ -28,9 +26,7 @@ SVEC base registers ...@@ -28,9 +26,7 @@ SVEC base registers
.. only:: latex .. only:: latex
.. warning:: .. include:: regs/svec_base_regs.rst
Unfortunately we are not able to include the memory map in PDF format.
Please for the memory map refer to the online documentation,
.. raw:: html .. raw:: html
:file: regs/svec_base_regs.htm :file: regs/svec_base_regs.htm
......
Subproject commit c3ffa27d348645cad57d09af56cf0001be9e5077 Subproject commit a7d98f10b9f696ad8b7d852ac7ebf94b28398d8e
Subproject commit c0d76b045da18a333b11c35f3f0ed5c270790fa6 Subproject commit 1be4f060e9ba5cb2e99ce47da64df1a9a968afc7
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