doc: add memory maps to the PDF

Signed-off-by: Adam Wujek <dev_public@wujek.eu>

doc: add memory maps to the PDF
Signed-off-by: Adam Wujek <dev_public@wujek.eu>
bf1d3a92 · Adam Wujek · bb31901e · bf1d3a92 · bf1d3a92 · bf1d3a92
Commit bf1d3a92 authored Jun 22, 2022 by Adam Wujek
7 changed files
--- a/doc/conf.py
+++ b/doc/conf.py
@@ -89,6 +89,11 @@ latex_documents = [
     'manual'),
 ]

+latex_elements = {
+    'passoptionstopackages': r'\PassOptionsToPackage{table}{xcolor}',
+    'preamble' : r'\definecolor{RoyalPurple}{cmyk}{1, 0.50, 0, 0}',
+}
+

 breathe_projects = {
    "fmctdc-lib":"doxygen-lib-output/xml/",

--- a/doc/gateware/memory-map.rst
+++ b/doc/gateware/memory-map.rst
@@ -30,9 +30,7 @@ the FMC-TDC-1NS-5CH modules.

 .. only:: latex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+   .. include:: regs/fmc_tdc_mezzanine_mmap.rst

 .. raw:: html
   :file: regs/fmc_tdc_mezzanine_mmap.htm
@@ -40,11 +38,9 @@ the FMC-TDC-1NS-5CH modules.
 One wire
 --------

-.. only:: latex
+.. raw:: latex
+    :file: regs/tdc_onewire_wb.tex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,

 .. raw:: html
   :file: regs/tdc_onewire_wb.html
@@ -58,11 +54,8 @@ EIC
 ---


-.. only:: latex
-
-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+.. raw:: latex
+    :file: regs/tdc_eic.tex

 .. raw:: html
   :file: regs/tdc_eic.html
@@ -75,11 +68,8 @@ Not used.
 Mem
 ---

-.. only:: latex
-
-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+.. raw:: latex
+    :file: regs/timestamp_fifo_wb.tex

 .. raw:: html
   :file: regs/timestamp_fifo_wb.html
@@ -87,11 +77,8 @@ Mem
 Mem DMA
 -------

-.. only:: latex
-
-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+.. raw:: latex
+    :file: regs/tdc_buffer_control_regs.tex

 .. raw:: html
   :file: regs/tdc_buffer_control_regs.html
@@ -99,11 +86,9 @@ Mem DMA
 Mem DMA EIC
 -----------

-.. only:: latex
+.. raw:: latex
+    :file: regs/dma_eic.tex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,

 .. raw:: html
   :file: regs/dma_eic.html

--- a/doc/gateware/regs/Makefile
+++ b/doc/gateware/regs/Makefile
@@ -17,12 +17,33 @@ HTML += tdc_eic.html
 HTML += tdc_onewire_wb.html
 HTML += timestamp_fifo_wb.html

-all: $(HTML)
+REST := spec_base_regs.rst
+REST += svec_base_regs.rst
+REST += svec_ref_fmc_tdc_mmap.rst
+REST += spec_ref_fmc_tdc_mmap.rst
+REST += fmc_tdc_mezzanine_mmap.rst
+
+
+LATEX += dma_eic.tex
+LATEX += fmc_tdc_direct_readout_slave.tex
+LATEX += tdc_buffer_control_regs.tex
+LATEX += tdc_eic.tex
+LATEX += tdc_onewire_wb.tex
+LATEX += timestamp_fifo_wb.tex
+
+all: html latex rest
+
+latex: $(LATEX)
+html: $(HTML)
+rest: $(REST)
+

 .PHONY: clean

 CHEBY_BUILD=(cd $(dir $<); ~/.local/bin/cheby -i $(notdir $<) --gen-doc --doc html) > $@
-WBGEN2_BUILD=(wbgen2 -D $@ $<)
+CHEBY_BUILD_REST=(cd $(dir $<); ~/.local/bin/cheby -i $(notdir $<) --gen-doc --doc rest) > $@
+WBGEN2_BUILD=(~/wr/tdc/wishbone-gen/wbgen2 -D $@ $<)
+WBGEN2_BUILD_TEX=(~/wr/tdc/wishbone-gen/wbgen2 -f latex -D $@ $<)

 fmc_tdc_mezzanine_mmap.htm: $(TOP_DIR)/hdl/cheby/fmc_tdc_mezzanine_mmap.cheby
 	$(CHEBY_BUILD)
@@ -57,8 +78,41 @@ tdc_eic.html:                      $(TOP_DIR)/hdl/rtl/wbgen/tdc_eic.wb
 tdc_onewire_wb.html:               $(TOP_DIR)/hdl/rtl/wbgen/tdc_onewire_wb.wb
 	$(WBGEN2_BUILD)

-timestamp_fifo_wb.html:            $(TOP_DIR)/hdl/rtl/wbgen/timestamp_fifo_wb.wb
-	$(WBGEN2_BUILD)
+fmc_tdc_mezzanine_mmap.rst: $(TOP_DIR)/hdl/cheby/fmc_tdc_mezzanine_mmap.cheby
+	$(CHEBY_BUILD_REST)
+
+spec_ref_fmc_tdc_mmap.rst: $(TOP_DIR)/hdl/cheby/spec_ref_fmc_tdc_mmap.cheby
+	$(CHEBY_BUILD_REST)
+
+svec_ref_fmc_tdc_mmap.rst: $(TOP_DIR)/hdl/cheby/svec_ref_fmc_tdc_mmap.cheby
+	$(CHEBY_BUILD_REST)
+
+svec_base_regs.rst: $(TOP_DIR)/hdl/ip_cores/svec/hdl/rtl/svec_base_regs.cheby
+	$(CHEBY_BUILD_REST)
+
+spec_base_regs.rst: $(TOP_DIR)/hdl/ip_cores/spec/hdl/rtl/spec_base_regs.cheby
+	$(CHEBY_BUILD_REST)
+
+timestamp_fifo_wb.tex:            $(TOP_DIR)/hdl/rtl/wbgen/timestamp_fifo_wb.wb
+	$(WBGEN2_BUILD_TEX)
+
+dma_eic.tex:                      $(TOP_DIR)/hdl/rtl/wbgen/dma_eic.wb
+	$(WBGEN2_BUILD_TEX)
+
+fmc_tdc_direct_readout_slave.tex: $(TOP_DIR)/hdl/rtl/wbgen/fmc_tdc_direct_readout_slave.wb
+	$(WBGEN2_BUILD_TEX)
+
+tdc_buffer_control_regs.tex:      $(TOP_DIR)/hdl/rtl/wbgen/tdc_buffer_control_regs.wb
+	$(WBGEN2_BUILD_TEX)
+
+tdc_eic.tex:                      $(TOP_DIR)/hdl/rtl/wbgen/tdc_eic.wb
+	$(WBGEN2_BUILD_TEX)
+
+tdc_onewire_wb.tex:               $(TOP_DIR)/hdl/rtl/wbgen/tdc_onewire_wb.wb
+	$(WBGEN2_BUILD_TEX)
+
+
+

 clean:
-	@rm -f *.md *.rst *.htm *.html
+	@rm -f *.rst *.htm *.html *.tex
--- a/doc/gateware/spec_ref_fmc_tdc.rst
+++ b/doc/gateware/spec_ref_fmc_tdc.rst
@@ -10,11 +10,10 @@ The memory map is divided in two parts: the :ref:`Carrier (SPEC) <SPEC base regs
 all SPEC designs, and the :ref:`TDC <TDC base regs>` part specific to the
 FMC-TDC-1NS-5CHA mezzanine.

+
 .. only:: latex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+   .. include:: regs/spec_ref_fmc_tdc_mmap.rst

 .. raw:: html
   :file: regs/spec_ref_fmc_tdc_mmap.htm
@@ -26,9 +25,8 @@ SPEC base registers

 .. only:: latex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+   .. include:: regs/spec_base_regs.rst
+

 .. raw:: html
   :file: regs/spec_base_regs.htm

--- a/doc/gateware/svec_ref_fmc_tdc.rst
+++ b/doc/gateware/svec_ref_fmc_tdc.rst
@@ -14,9 +14,7 @@ FMC-TDC-1NS-5CHA mezzanine.

 .. only:: latex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+   .. include:: regs/svec_ref_fmc_tdc_mmap.rst

 .. raw:: html
   :file: regs/svec_ref_fmc_tdc_mmap.htm
@@ -28,9 +26,7 @@ SVEC base registers

 .. only:: latex

-   .. warning::
-      Unfortunately we are not able to include the memory map in PDF format.
-      Please for the memory map refer to the online documentation,
+   .. include:: regs/svec_base_regs.rst

 .. raw:: html
   :file: regs/svec_base_regs.htm

--- a/spec @ a7d98f10
+++ b/spec @ a7d98f10
-Subproject commit c3ffa27d348645cad57d09af56cf0001be9e5077
+Subproject commit a7d98f10b9f696ad8b7d852ac7ebf94b28398d8e
--- a/svec @ 1be4f060
+++ b/svec @ 1be4f060
-Subproject commit c0d76b045da18a333b11c35f3f0ed5c270790fa6
+Subproject commit 1be4f060e9ba5cb2e99ce47da64df1a9a968afc7