update xilinx project files for SPEC and SVEC
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- hdl/syn/spec/Makefile 438 additions, 0 deletionshdl/syn/spec/Makefile
- hdl/syn/spec/wr_spec_tdc.xise 690 additions, 435 deletionshdl/syn/spec/wr_spec_tdc.xise
- hdl/syn/svec/Makefile 429 additions, 0 deletionshdl/syn/svec/Makefile
- hdl/syn/svec/wr_svec_tdc.xise 606 additions, 545 deletionshdl/syn/svec/wr_svec_tdc.xise
hdl/syn/spec/Makefile
0 → 100644
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hdl/syn/svec/Makefile
0 → 100644
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