+ Edit setup_workspace.sh to reflect which FPGA carrier board you want to build the firmware for.Currently supported boards: Xilinx SP601 , Xilinx SP605 . Default is SP601
5. Execute the script to set-up the ISE project:
<pre> sh setup_workspace.sh </pre>
This will check out copies of the IPBus and AIDA mini-TLU repositories,
create a directory for the files produced by firmware synthesise
and create a Xilinx ISE project file.
6. Produce the bit-stream
+ either:
+ - Open the Xilinx project file at <working_directory>/workspace/fmc-mtlu.xise
+ - Select Tools->COREGEN
+ - When Coregen starts select Project->Upgrade and Regenerate all project IP ( this will take several minutes )
+ - Make sure the top-level file is selected and click on "Generate Programming File"