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FMC DIO 5ch TTL a
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Last edited by Erik van der Bij Jun 16, 2021
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fmc-dio-5chttla FMC 5-channel Digital I/O module

The fmc-dio-5chttla 5-channel digital I/O module is a simple board for digital I/O on LEMO connectors.
It has been designed for testing White Rabbit functionality as part of the SPEC Demonstration Package for White Rabbit (manual), and it can be used for other general purpose applications too.

Functional specifications

  • 5 input/output ports with independently programmable direction (Lemo 00 connectors).
  • Output levels: LVTTL, capable of driving +2.5 V over a 50-Ohm load. At power-up the outputs are in Hi-Z state.
  • Input levels: any logic standard from Vih = 1 V to Vih = 5 V (threshold programmable for each input independently).
  • Output Rise/fall times: max. 2 ns.
  • I/O bandwidth: 200 MHz.
  • Programmable 50-Ohm input termination in each channel.
  • LVDS I/O on the carrier side.
  • One of the inputs is capable of driving a global clock net in the carrier's FPGA.
  • Inputs and outputs protected against +15V pulses with a pulse width of up to 10us @ 50Hz.
  • 4-layer PCB

Block diagram


Project information

  • Official production documentation: EDMS EDA-02408
  • Notes on the hardware design
  • Software
  • Frequently Asked Questions
  • Users

Contacts

Commercial producers

  • FMC DIO, Seven Solutions, Spain
  • FMC DIO 5ch TTL a, Creotech, Poland
  • fmc dio 5chttla, INCAA Computers, Netherlands.

Project

  • Erik van der Bij - CERN - General question about project
  • Tom Wlostowski - CERN - Designer

Project Status

Date Event
27-05-2011 Start of brainstorming.
19-07-2011 Five cards built. Has some bugs.
20-09-2011 Updated schematics in SVN. Will pass through CERN's design office.
12-10-2011 Production documentation available in EDMS. Project closed.
07-11-2011 Seven Solutions will produce and commercialise the cards.
16-12-2011 Order placed for production test software writing.
24-02-2012 Seven Solutions will deliver 5 cards 2nd week of March. Production test program will be written in March.
20-03-2012 Two IC's in design V1-0 are of wrong type. Will create a new version. No PCB change required.
13-04-2012 First version of Production test program written and documented in PTS project.
13-04-2012 Order for 10 V1 modules placed.
15-08-2012 V2-0 design being made to solve known Issues. V1-2 solves issue 487.
Removed "withstands output shorted" spec: it works but is out of spec of driver IC.
13-09-2012 Delivery of 10 V1 modules will be shipped to CERN.
25-10-2012 Review of V2-0.
26-06-2014 A new version of the PTS test program exists that loads the EEPROM with SDB data. Please contact us for info.
30-01-2020 CERN had ordered 50 modules in 2014 and 35 in 2015. Card is used in the CERN accelerator complex.

Tom Wlostowski, Erik van der Bij - 30 January 2020

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