back to using uartlite cause same behaviour of the wrpc uart
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- FASEC_prototype.srcs/sources_1/bd/system_design/hdl/system_design.hwdef 0 additions, 0 deletions...e.srcs/sources_1/bd/system_design/hdl/system_design.hwdef
- FASEC_prototype.srcs/sources_1/bd/system_design/hdl/system_design.vhd 11 additions, 6 deletions...ype.srcs/sources_1/bd/system_design/hdl/system_design.vhd
- FASEC_prototype.srcs/sources_1/bd/system_design/hdl/system_design_wrapper.vhd 1 addition, 1 deletion.../sources_1/bd/system_design/hdl/system_design_wrapper.vhd
- FASEC_prototype.srcs/sources_1/bd/system_design/hw_handoff/system_design.hwh 26 additions, 18 deletions...s/sources_1/bd/system_design/hw_handoff/system_design.hwh
- FASEC_prototype.srcs/sources_1/bd/system_design/hw_handoff/system_design_bd.tcl 35 additions, 31 deletions...ources_1/bd/system_design/hw_handoff/system_design_bd.tcl
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_0/sim/system_design_auto_pc_0.v 288 additions, 0 deletions.../ip/system_design_auto_pc_0/sim/system_design_auto_pc_0.v
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_0/synth/system_design_auto_pc_0.v 290 additions, 0 deletions...p/system_design_auto_pc_0/synth/system_design_auto_pc_0.v
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_0/system_design_auto_pc_0.xml 1093 additions, 92 deletions...gn/ip/system_design_auto_pc_0/system_design_auto_pc_0.xml
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_0/system_design_auto_pc_0_ooc.xdc 57 additions, 0 deletions...p/system_design_auto_pc_0/system_design_auto_pc_0_ooc.xdc
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_1/sim/system_design_auto_pc_1.v 348 additions, 0 deletions.../ip/system_design_auto_pc_1/sim/system_design_auto_pc_1.v
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_1/synth/system_design_auto_pc_1.v 350 additions, 0 deletions...p/system_design_auto_pc_1/synth/system_design_auto_pc_1.v
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_1/system_design_auto_pc_1.xml 1093 additions, 92 deletions...gn/ip/system_design_auto_pc_1/system_design_auto_pc_1.xml
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_auto_pc_1/system_design_auto_pc_1_ooc.xdc 57 additions, 0 deletions...p/system_design_auto_pc_1/system_design_auto_pc_1_ooc.xdc
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/hdl/verilog/processing_system7_v5_5_processing_system7.v 2 additions, 2 deletions.../hdl/verilog/processing_system7_v5_5_processing_system7.v
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/hdl/verilog/system_design_processing_system7_0_0.hwdef 0 additions, 0 deletions..._0/hdl/verilog/system_design_processing_system7_0_0.hwdef
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/ps7_init.c 204 additions, 24 deletions...design/ip/system_design_processing_system7_0_0/ps7_init.c
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/ps7_init.html 3176 additions, 817 deletions...ign/ip/system_design_processing_system7_0_0/ps7_init.html
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/ps7_init.tcl 18 additions, 6 deletions...sign/ip/system_design_processing_system7_0_0/ps7_init.tcl
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/ps7_init_gpl.c 204 additions, 24 deletions...gn/ip/system_design_processing_system7_0_0/ps7_init_gpl.c
- FASEC_prototype.srcs/sources_1/bd/system_design/ip/system_design_processing_system7_0_0/ps7_parameters.xml 3 additions, 3 deletions...p/system_design_processing_system7_0_0/ps7_parameters.xml
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