L6_PWR is dedicated to MP3V3 which takes about a half of the board,
perhaps it could be also used for another power net?
L4_PWR: P2V5 has a strange shape, I suppose there were 2.5V pins in
the bottom part that do not exist anymore
Top, L8: there are several single-ended clocks (CAL_CONTROL.SHIFTCLK,
REF_CONTROl.UPDATECLK, LO_CONTROL.SHIFTCLK) routed together, perhaps
there could be a larger distance between them to reduce EMI
Bottom: slightly misaligned vias (GND, X:183.4mm Y:209.2mm and
Bottom: extra vias for C84?
Bottom: extra via at X:123.575mm Y:134.2mm?
Bottom: swapping pins 2 and 3 in IC13 would make the connections shorter