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High Performance MTCA.4 White Rabbit Receiver
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Last edited by Erik van der Bij Mar 23, 2022
Page history

eRTM14/15 - High Performance White Rabbit Timing Receiver in MTCA.4 format

Project description

The HP WR Timing Receiver is composed by two MTCA eRTM (Rear Transition Module) modules:

  • Digital board (WR node), sitting in the slot 14. The board provides a redundant uplink to the WR network (2 SFP ports) and hosts the FPGA that implements the WR stack.
  • RF board, using the slot 15. This board produces the Local Oscillator/Reference RF signals using a DDS as well as two configurable digital LVPECL clocks. They are distributed to the RTM/AMC slots of a MTCA.4 crate through the MTCA.4 RF Backplane The two boards always go together (stacked in a "sandwich" form) into the neighboring backplane slots 14 and 15. Inter-board communication is done through a high speed board-to-board cable.

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Image of the eRTM14/15 board set


Block diagram


Features

Digital Board

  • Kintex-7 (XC7K70) FPGA
    • White Rabbit Core with redundant WR links
    • Fully deterministic gigabit transceiver (GTX) with no-phase-jump mode
    • Controls the RF board through the board-to-board connector
  • Front panel:
    • 2 SFP cages for White Rabbit input
    • PPS input and output connectors (SMA)
    • 10 MHz input (SMA)
    • WR clock output (SMA)
    • USB serial console

RF Board

  • Front panel outputs:
    • RTM clocks CLKA and CLKB (SMA)
    • 2 LO Monitor (SMA)
    • 2 REF Monitor (SMA)
  • Zone-3 backplane connector:
    • 11 RTM_CLKA signals (configurable: 62.5 MHz, 100 MHz, 125 MHz, 200 MHz, 250 MHz, 500 MHz)
    • 11 RTM_CLKB signals (configurable: 62.5 MHz, 100 MHz, 125 MHz, 200 MHz, 250 MHz, 500 MHz)
    • LVPECL clock signals with double termination, unused clocks can be shut down.
    • Possibility to encode PPS and time-code information into CLKA and CLKB
    • Less than 100 fs RMS jitter (100 Hz - 20 MHz)
  • LO/REF/CAL backplane connector (Radiall Coaxipack)
    • 9 LO signals, 10-250 MHz, 12 dBm
    • 9 REF signals, 10-250 MHz, 12 dBm
    • Less than 100 fs RMS jitter (100 Hz - 5 MHz)
    • RF power monitoring on all backplane RF outputs
    • Unused RF channels can be internally terminated
    • Temperature sensors on LO and REF distribution sections
  • Unique IDs
    • Three EUI-48 (MAC addresses) on WR Main Board (two for Ethernet links, one for storage)
    • One EUI-48 ID for RF board (storage)
  • STM32F microcontroller for MicroTCA management
    • Runs OpenMMC

Documentation

Digital Board - eRTM14

  • EDMS schematics & layout: EDA-03849-V1-0 - Review notes
  • EDMS schematics & layout: EDA-03849-V2-0

RF Board - eRTM15

  • EDMS schematics & layout: EDA-03850-V1-0 - Review notes
  • EDMS schematics & layout: EDA-03850-V2-0, EDA-03850-V2-1

Read more

  • MTCA 4.1 for LLRF distribution using WR: presentation describing the main design concepts
  • New WR Developments for Low Level Radio Frequency Systems, 11th WR Workshop 2021
  • Synchronization through RF backplane
  • MTCA.4 RF Backplane
    • Note: the backplane is not an open design and needs licensing from DESY. Patent application is filed: EP142004371.
  • MTCA 4 standard
  • MTCA 4.1 standard (extension of MicroTCA 4 for RF and timing applications)
  • Users

Contacts

Commercial producers

  • none

General questions about project

  • Mattia Rizzi, CERN
  • Tomasz Wlostowski, CERN

Status

Date Event
25-10-2017 OHR project set up
01-08-2017 Start of schematics
08-04-2018 Final schematics ready for review
15-06-2018 eRTM14 Schematics review meeting
01-07-2018 Start layout of eRTM14 with the DEM
01-10-2018 eRTM14 layout complete, pending review notes
15-11-2018 eRTM15 schematics review notes
20-11-2018 eRTM15: start of layout work
20-12-2018 3 eRTM14 boards arrived
10-01-2019 Smoke test passed. WR core running on eRTM14 FPGA
22-02-2019 eRTM15 layout ready for review
13-01-2020 eRTM14 V2 PCB layout finished and design released
30-01-2020 LLRF project presented. Expect series of 15 boards ready for installation by June 2020
22-02-2020 eRTM15 V2 PCB layout finished and design released
16-06-2020 Four eRTM14 V2 received and passed smoke test. eRTM15 should be available by 16/07/20.
20-10-2020 eRTM15 received and tested. In total there are 3 eRTM15-V1 and 16 eRTM15-V2 boards.
08-03-2021 8 eRTM received and being tested.
08-10-2021 Presentation New WR Developments for Low Level Radio Frequency Systems, 11th WR Workshop 2021
13-10-2021 16 eRTMs tested OK (2 underperforming in terms of phase noise). 2 installed in SPS RF system, 4 in labs, 4 in CEM labs
Likely new production needed because of high interest. Would need a new version (see Issues).

Files

  • EDA-03849-V1_0_project.pdf
  • rf_board.pdf
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  • Ertm14 schematics & layout review
  • Ertm15 schematics & layout review
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  • Review_20180615
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