Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
DIOT Zynq Ultrascale-based System Board
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
9
Issues
9
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
Projects
DIOT Zynq Ultrascale-based System Board
Repository
a51a03bae3c471f1c99833da43535c4297734560
Switch branch/tag
diot-sb-zu
hw
fpga_pin_delays.csv
Find file
Blame
History
Permalink
adding layout v1.0 after CERN reviews and fixes
· 03549333
Grzegorz Daniluk
authored
Sep 08, 2020
03549333
fpga_pin_delays.csv
59.5 KB
Edit
Web IDE
Replace fpga_pin_delays.csv
×
Attach a file by drag & drop or
click to upload
Commit message
Replace fpga_pin_delays.csv
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.
