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DIOT Igloo2-based radiation-tolerant System Board
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DIOT Igloo2-based radiation-tolerant System Board
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Different packages used for IC4 and IC5 (both TPS7A4901)
#70
· opened
Jan 27, 2021
by
Christos Gentsos
layout v1.0
minor
CLOSED
1
updated
Jan 28, 2021
Wrong pull ups at voltage translators (IC7)
#69
· opened
Dec 14, 2020
by
Volker Schramm
layout v1.0
Dec 18, 2020
critical
CLOSED
2
updated
Jan 28, 2021
power cycle pulse generator
#9
· opened
Oct 23, 2020
by
Paul PERONNARD
v2.0
critical
Done
Schematic
CLOSED
13
updated
Feb 15, 2023
Capacitor V-Ratings
#1
· opened
Oct 13, 2020
by
Volker Schramm
layout v1.0
critical
CLOSED
2
updated
Apr 01, 2021
bpolV12-board-swap-voltages
#145
· opened
Nov 17, 2022
by
Alén Arias Vázquez
CLOSED
0
updated
Jan 10, 2023
Triplicate clock input
#132
· opened
Oct 05, 2021
by
Tristan Gingold
improvement
CLOSED
4
updated
Jan 10, 2023
Add a 3 pin header to connect a UART for debugging
#130
· opened
Sep 29, 2021
by
Tristan Gingold
improvement
CLOSED
2
updated
Jan 10, 2023
Fix OD_2V5C and OD_2V5D net labels
#129
· opened
Sep 29, 2021
by
Tristan Gingold
cosmetics
CLOSED
2
updated
Dec 01, 2022
investigate adding current limiter for FPGA core to prevent destructive SELs
#127
· opened
Sep 21, 2021
by
Grzegorz Daniluk
improvement
CLOSED
2
updated
Jan 10, 2023
add de-latching circuit to monitor FPGA core current
#126
· opened
Sep 21, 2021
by
Grzegorz Daniluk
improvement
CLOSED
3
updated
Jan 10, 2023
Height of components on bottom layer
#121
· opened
May 18, 2021
by
Spyridon Georgakakis
improvement
CLOSED
2
updated
Jan 10, 2023
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