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DIOT Igloo2-based radiation-tolerant System Board
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DIOT Igloo2-based radiation-tolerant System Board
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Unify harness representation in schematics
#36
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
cosmetics
CLOSED
0
updated
Nov 10, 2020
Net Identifier scope and Hierarcy
#35
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
cosmetics
CLOSED
2
updated
Dec 03, 2020
relicense to CERN-OHL-W v2
#32
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
cosmetics
CLOSED
0
updated
Oct 27, 2020
aligning net labels
#31
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
cosmetics
CLOSED
1
updated
Nov 11, 2020
FPGA_Banks_6_7: connecting FMC clocks
#30
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
question
CLOSED
1
updated
Nov 10, 2020
FPGA_Banks_6_7: I guess we don't need the filter circuit for SERDES_0_L23_*
#29
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
question
CLOSED
2
updated
Nov 04, 2020
Powering: Do we need 12V brownout detection circuit?
#21
· opened
Oct 23, 2020
by
Grzegorz Daniluk
sch v1.0
question
CLOSED
4
updated
Nov 04, 2020
FPGA decoupling capacitors on dedicated sheet
#8
· opened
Oct 23, 2020
by
Paul PERONNARD
sch v1.0
cosmetics
CLOSED
1
updated
Nov 03, 2020
MoniMod reset
#5
· opened
Oct 23, 2020
by
Grzegorz Daniluk
sch v1.0
question
CLOSED
1
updated
Oct 23, 2020
backplane signal names
4 of 4 tasks completed
#4
· opened
Oct 23, 2020
by
Grzegorz Daniluk
sch v1.0
cosmetics
CLOSED
0
updated
Nov 06, 2020
Power dissipation IC4
#2
· opened
Oct 13, 2020
by
Volker Schramm
sch v1.0
question
CLOSED
3
updated
Jan 27, 2021
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