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DIOT Igloo2-based radiation-tolerant System Board
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DIOT Igloo2-based radiation-tolerant System Board
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Power dissipation IC4
#2
· opened
Oct 13, 2020
by
Volker Schramm
sch v1.0
question
CLOSED
3
updated
Jan 27, 2021
Colouring of harness, wires, comments should take into account accessibility for color vision deficiency
#41
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
cosmetics
CLOSED
4
updated
Dec 03, 2020
Net Identifier scope and Hierarcy
#35
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
cosmetics
CLOSED
2
updated
Dec 03, 2020
FMC: add a note saying which LA_D are connected to FPGA differential-capable bank, it's not all of them
#68
· opened
Nov 16, 2020
by
Grzegorz Daniluk
sch v1.0
cosmetics
CLOSED
1
updated
Nov 16, 2020
Constrain_Periph_Nets: length matching for LVDS_17 quite loose
#67
· opened
Nov 16, 2020
by
Grzegorz Daniluk
sch v1.0
minor
CLOSED
2
updated
Nov 16, 2020
FPGA_Banks_1_2: add a note next to Bank1 saying it cannot handle LVDS therefore swapping signals with other banks shall be avoided
#66
· opened
Nov 16, 2020
by
Grzegorz Daniluk
sch v1.0
cosmetics
CLOSED
3
updated
Nov 16, 2020
Top_Misc: R171 should be not mounted
#65
· opened
Nov 13, 2020
by
Grzegorz Daniluk
sch v1.0
CLOSED
0
updated
Nov 13, 2020
Translate_2V5_to_PPERIPH: SHARED_BUS0..4 shall be puled up on System Board so that they can be used as multi-drop lines e.g. for IRQs
#64
· opened
Nov 13, 2020
by
Grzegorz Daniluk
sch v1.0
CLOSED
0
updated
Nov 13, 2020
Translate_2V5_to_PPERIPH: SERVMOD_DIR pulled-up multiple times
#63
· opened
Nov 13, 2020
by
Grzegorz Daniluk
sch v1.0
minor
CLOSED
1
updated
Nov 13, 2020
CMS Vishay Y14870R05000B9R availability is limited
#43
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
minor
CLOSED
1
updated
Nov 13, 2020
Go through the design checklist in AC393
#22
· opened
Oct 23, 2020
by
Christos Gentsos
sch v1.0
critical
CLOSED
1
updated
Nov 13, 2020
Fit two lines / level shifter for SERVMOD
#62
· opened
Nov 12, 2020
by
Christos Gentsos
sch v1.0
minor
CLOSED
0
updated
Nov 12, 2020
IC2 Configuration and VCONTROL pin
#56
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
minor
CLOSED
2
updated
Nov 12, 2020
IC14 analog domain issues
#57
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
minor
CLOSED
2
updated
Nov 12, 2020
Monitoring: ATSAMD21G18 is known to freeze in radiation, we should also have a power cycle/reset line from FPGA
#26
· opened
Oct 26, 2020
by
Grzegorz Daniluk
sch v1.0
critical
CLOSED
5
updated
Nov 12, 2020
FPGA Pin D24 is not an I/O.
#48
· opened
Nov 05, 2020
by
Spyridon Georgakakis
sch v1.0
cosmetics
CLOSED
2
updated
Nov 12, 2020
I'd add I2C/SPI I/O expander to encode with resistor net version of the board and some unique ID chip.
#33
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
minor
CLOSED
0
updated
Nov 11, 2020
Power Bank 2 with 3.3V and get rid of a bunch of level shifters
#61
· opened
Nov 11, 2020
by
Christos Gentsos
sch v1.0
critical
CLOSED
1
updated
Nov 11, 2020
Translate_GPIO_to_2V5: more uniform translation circuits
#27
· opened
Oct 27, 2020
by
Grzegorz Daniluk
sch v1.0
minor
CLOSED
3
updated
Nov 11, 2020
Add a pin header for a possible monitoring expansion board
#60
· opened
Nov 11, 2020
by
Christos Gentsos
sch v1.0
minor
CLOSED
0
updated
Nov 11, 2020
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