DEVRST_FMC_N used as FPGA reset vs pulse duration from nanoFIP
In the mounting variant where DEVRST_FMC_N is used as FPGA reset (by default it's used as PWRCYC), the duration of the pulse generated by the nanofip is only 200ns. This is too short to discharge capacitor C283 and so the FPGA reset is never generated.
If one requires to use DEVRST_FMC_N as FPGA reset, then C283 has to be desoldered.