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Adrian Byszuk authored
The only thing required by Vivado to recognize random FTDI chips as a valid JTAG dongle is a magic EEPROM content. This commit adds this magic sequence to FTDI configuration script. Partially inspired by Xilinx's own "program_ftdi" tool bundled with Vivado versions >= 2022.1, which allows to do exactly the same thing.
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Si5341-RevD-CCE-Registers.txt | ||
configure_ftdi.py | ||
configure_si5341.py |