- Feb 15, 2022
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Grzegorz Daniluk authored
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- Jan 11, 2022
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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- Dec 21, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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- Dec 17, 2021
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Christos Gentsos authored
This gets around the setjmp thumb2 issue during compilation.
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- Dec 15, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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- Dec 08, 2021
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Christos Gentsos authored
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Christos Gentsos authored
They were
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- Dec 03, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- Nov 02, 2021
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Christos Gentsos authored
When the BE_COMPLIANT_USE_LINEAR16 switch is set to False, causing the (non-standard-compliant) LINEAR11 to be used for the output voltage instead of LINEAR16, the mode field of the VOUT_MODE register shall return an invalid value (3'b111) to indicate non-compliance.
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- Oct 28, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
Previously, a failed I2C transaction would leave the data buffer intact, and if one didn't look at the return status they might assume valid data were returned. This modification should make it easier to identify failed transactions.
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Christos Gentsos authored
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- Oct 25, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- Oct 22, 2021
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Christos Gentsos authored
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- Oct 20, 2021
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Christos Gentsos authored
Especially functions that *set* TMR'ed variables *must* use it, otherwise they only set one of the three copies, which makes the data invalid.
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Christos Gentsos authored
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- Oct 18, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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- Oct 14, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- Oct 13, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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- Oct 12, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
When a bus error happened, the I2C peripheral's error bit remained set. This caused it to respond erroneously in future transactions. Now, when a bus error occurs, we're clearing the error bit and setting the error flags in the STATUS_BYTE and STATUS_CML PMBus registers. After the user reads those registers (using commands 0x78 and 0x7E), their error flags are cleared.
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- Oct 08, 2021
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Christos Gentsos authored
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Christos Gentsos authored
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Christos Gentsos authored
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