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Beam Positoning Monitor - Gateware
Commit 428a9d35 authored by Adrian Byszuk's avatar Adrian Byszuk
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Fix PCIe PIPE mode simulation

parent c412a235
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Showing with 1 addition and 1 deletion
hdl/top/pcie/bpm_pcie_k7.vhd
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...@@ -1940,7 +1940,7 @@ begin ...@@ -1940,7 +1940,7 @@ begin
generic map( generic map(
PL_FAST_TRAIN => PL_FAST_TRAIN, PL_FAST_TRAIN => PL_FAST_TRAIN,
PCIE_EXT_CLK => "FALSE", PCIE_EXT_CLK => "FALSE",
PIPE_SIM_MODE => "FALSE" PIPE_SIM_MODE => PIPE_SIM_MODE
) )
port map( port map(
-------------------------------------------------------------------------------------------------------------------- --------------------------------------------------------------------------------------------------------------------
......
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