v4 routing done
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Developer
- Pin swapping at FPGA:
LED_B; LED_G; LED_R; MLVDS_DE_1_C; MLVDS_DE_2_C; MLVDS_DE_3_C; MLVDS_DE_7_C; MLVDS_DE_8_C
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RTM GTP connection to bank 213 swap: old order: 5 6 7 4. New order: 4 5 6 7
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Deleted C776 and C815 (double AC caps for FCLK)
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Added decoupling capacitors for IC22, U1, IC66, IC35
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Deleted jumpers at P_MON warning lines. (UI_mon.SchDoc)
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Swapped UART TX and RX at IC28 and IC29. Changed pull up/down resistors to configure a proper direction of translation.
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Deleted jumpers at HB14 line (FMC2)
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I2C pullups to I2C 6 and I2C 7 channel changed from FMC1_3P3VAUX to P3V3MP. 3rd channel changed from P3V3_PMON to P3V3MP.
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Pin swap at MMC: P12V (power monitor by MMC ADC) and FMC1_PV
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Deleted TP6 GND testpoint. We still have Terminal Socket (B1...x) and TPD testpoints for GND.
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IC6 (3rd power monitor) now has own ferrite bead.
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IC73 - pull up R145 R141 connected to MUX1_VDD instead of P3V3_CLKSW
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Added all RTM diff io lines to DE_SIG and SE60DE100 class.