AMC FMC Carrier (AFC)
Project description
The AMC FMC carrier is partially based on SPEC (supply, WR clocks) design. It was primarily specified by the Brazilian Synchrotron Light Laboratory (LNLS) and designed by Warsaw University of Technology (WUT) to support quad 16-bit ADC FMC boards for Sirius BPM electronics. Among many features, the card has very flexible clock circuit that enables any clock source to be connected to any clock input, including telecom clock, FMC clocks and FPGA.
AFC production board - (Topview, Bottom view)
Functional specifications
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Programmable resources:
- Xilinx Artix-7 200T FFG1156 FPGA (XC7A200T-3FFG1156C)
- MMC: LPC1768
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Memory:
- 2 GB DDR3 SDRAM (32-bit interface), 800Mhz
- SPI Flash for FPGA configuration
- EEPROM with MAC and unique ID
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Connectivity:
- 2 high pin count (HPC) slots for 2 single width mezzanines or 1 double width mezzanine
- Micro-USB connected to IPMI and FPGA
- MGT can be connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2, Port0, Port1, Port2, Port3, RTM
- RTM connector with 8 GTP routed to it. Compatible with RTM-4SFP-3QSFP module.
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Supply:
- Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V (independent for each FMC)
- Voltage and current monitoring for all FMC power buses
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Other:
- Clock distribution circuit compatible with White Rabbit and ARTIQ
- Temperature monitoring: FMC1, FMC2, supply, FPGA core, DDR memory
- JTAG access to FMC and RTM
Detailed project information
Changelog between v3.1 and v4 i available under Documentation page
- Documentation
- Users
-
MicroTCA based Platform for advanced particle accelerators diagnostics - CERN-ACC-2014-0357, 2014.
100-page document describing the AFC design.
Contacts
Commercial producers
- AMC FMC Carrier – AFC - Creotech, Poland
- TechnoSystem, Poland, contact sales at: sales@technosystem.com.pl
General question about project
Project status
| Date | Event |
|---|---|
| 23-07-2012 | Digital back-end for Sirus BPM schematics started. Creotech is in charge of the boards design. |
| 12-09-2012 | First version of schematics pushed to the repository. |
| 24-09-2012 | Proposal for cooling, carrier and backplane components placement. |
| 09-11-2012 | Project redefinition: backplane and enclosure will use MicroTCA.4 COTS hardware. The FPGA board should be an AMC board compliant with MTCA.4. |
| 1-04-2013 | PCB finished. |
| 29-04-2013 | PCB assembled, still waiting for panels from ELMA. |
| 29-05-2013 | PCIe works, SDRAM works, clocks work. |
| 8-09-2013 | Next production batch (10 pieces) of the board started. Applied several cosmetic changes but 100% backward compatibility is preserved. |
| 01-10-2013 | Batch of 10 pcbs delivered |
| 01-11-2013 | All boards up and running |
| 20-03-2014 | Version 3 with RTM ready for production |
| 10-04-2014 | 7 pieces produced |
| 17-05-2014 | PTS finished |
| 20-05-2014 | Tests finished. 6.5 Gbit/s operation verified with RTM-SFP-8 |
| 04-05-2020 | WUT starts work on AFC v4, for more information see the upgrade issue |
| 30-04-2021 | AFC v4 prototypes being built. |
| 19-05-2021 | 7 prototypes AFC v4.0.1 up and running |
Filip Świtakowski - 19 Oct 2021