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This is an archived project. Repository and other project resources are read-only.
hdl-core-lib
wr-cores
wrpc-sw
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a450ecd4
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a450ecd4
authored
12 years ago
by
Grzegorz Daniluk
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a450ecd4
...
@@ -174,6 +174,10 @@ should look like this:
...
@@ -174,6 +174,10 @@ should look like this:
$
export XILINX
=/
opt
/
Xilinx
/
<version>
/
ISE
_
DS
$
export XILINX
=/
opt
/
Xilinx
/
<version>
/
ISE
_
DS
@end example
@end example
@b
{
Note:
}
the Xilinx project file included in the WRPC sources was created with
Xilinx ISE
14
.
1
. It is recommended to use the newest available version of ISE
software.
@sp
1
@sp
1
HDL sources for WR PTP Core can be synthesized with nothing more but Xilinx
HDL sources for WR PTP Core can be synthesized with nothing more but Xilinx
ISE software, but using @i
{
hdlmake
}
tool developed at CERN is much more
ISE software, but using @i
{
hdlmake
}
tool developed at CERN is much more
...
@@ -298,6 +302,15 @@ the ptp-noposix you have to execute the following git commands:
...
@@ -298,6 +302,15 @@ the ptp-noposix you have to execute the following git commands:
$
git submodule update
$
git submodule update
@end example
@end example
First you have to compile the tools provided with WRPC software which are used
later during the software compilation:
@example
$
cd tools
$
make
$
cd ..
@end example
Now you have everything that is needed to build the software for WRPC. Before
Now you have everything that is needed to build the software for WRPC. Before
compilation the decision can be made whether to turn on or not the software
compilation the decision can be made whether to turn on or not the software
support for Etherbone core that is integrated inside WRPC gateware for SPEC
support for Etherbone core that is integrated inside WRPC gateware for SPEC
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