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LIBSFP is a software library that contains generic functions to access SFP devices via I2C.

More info can be found on this wiki page.

Libre-FDATool is a Python package aimed at helping in the analysis and design of HDL filters from high-level specifications. This Free/Libre Open Source software supports both VHDL and Verilog code generation and relies on a collection of Free scientific and EDA tools for providing advanced features -- simulation, graphics, debugging, etc.

In order to overcome the problems often related with deploying open design toolchains from the ground up across different host environments, Libre-FDATool and the associated third-party tools are alternatively distributed in a customized GNU/Linux virtual machine image. This virtualized solution is ready to use right out of the box and can be easily deployed by only using free software in any mainstream Operating System (GNU/Linux, Windows, OS-X, Solaris).

The level conversion board project hosts a set of boards in VME form factor, with additional remote diagnostics/monitoring via I2C.

The image processing library offers multiple cores for on-chip vision-feature extraction. HDL modules are provided in different languages such as Handel-C or VHDL and applicable to various embedded and reconfigurable devices. They can be of interest for applications such as particle tracking, analysis of fluid dynamics, artificial vision for robotics, or object recognition.

HoloBlade is an open-hardware driver-stack for Spatial Light Modulators (SLMs). Its primary application is for holographic displays and may be used in applied optics research fields as telecommunications, astronomy, microscopy and optical computing.

It is a simple, low-cost measurement device equipped with GPS, GPRS modem, keyboard, display and LiOn battery. It can be also supplied/charged via a USB connector. It is enclosed in a nice-looking Hammond enclosure. It also has 3 RJ50 connectors that enable connection of various types of sensors. Each sensor can be connected using UART, I2C, SPI, 1-wire or analog interface. The device connects with a remote server which is also part of the development. We want to use them at Warsaw University of Technology to build a distributed network of sensors.

We have designed an FPGA Mezzanine card (standard FMC/Vita 57) for high-channel-count electrophysiology, with 128 channels (potentially up to 512), based upon Intan Tech's RHA2132 (2 uV rms input-referred noise), sampled at 25kHz 18bit by AD7982. We are basing our design on the reference design provided by Reid Harrison of Intan Tech for their 16-channel evaluation board. The expected cost of the device should be under 5000$.

In order to have an integrated solution we intend to have as default carrier the Opal Kelly Shuttle LX1, an inexpensive USB FMC carrier with an excellent USB controller. The integrated solution will be completed with software on the PC side to grab to disk continuously and/or display in some fashion all 128 channels.

Our status: We have an alpha card. It has passed most tests---we can grab from any channel at 1MS/s. We have an alpha microcode: it grabs from any channel and stores on the PC.

Our current team: Marcelo Magnasco (Rockefeller University, New York), design. Andres Cicuttin (ICTP, Trieste), schematics + fpga Maria Liz Crespo (ICTP, Trieste), fpga Sanjee Abeytunge (MSKCC, New York) layout Nicholas Joseph (RU) Macintosh drivers

Training project to learn about Power Delivery Network measurements and simulations. With a PDN usually the power distribution on a PCB is meant. This project describes a PCB with additional connectors to measure the power distribution quality. More info at the Wiki page

Corelib - Project to share generic HDL cores.

More info at the Wiki page

The GSI Timing Starter Kit is a functional snapshot of the eventual FAIR timing system, which is under active development. It demonstrates real-time coordination of two front-end equipment controllers. The product consists of a data master (Linux PC) which coordinates events, a timing master which synchronizes clocks (White Rabbit switch), and two front-end equipment controllers (either SPECv4 or SCUv2).

A bridge between the local bus of the Gennum GN4124 (PCIe to local bus bridge) and Wishbone.

A Virtex6-based optical link interface AMC equipped with SFP+ and FMC sockets

The GBT-based Expandable Front-End (GEFE) is a multipurpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. More info at the Wiki page

A fully open electronic watch project featuring an integrated GPS receiver. More info at the Wiki page

The Furnarius Rufus PCB Milling Machine is an open-source digital fabrication tool designed to lower the costs of prototyping and small scale manufacturing of scientific and educational instruments. More info at the Wiki page

This project defines data structures, to be embedded in the FPGA memory address space, to enumerate the devices that have been synthetized in the current design. The same structure is also used as a simple flash file system. AKA Self-Describing Bus (SDB) Specification for Logic Cores. The layout is simple enough to be parsed both by the host and by the internal soft-core, if any.

The documentation is public, and related code is GNU GPL licensed.

Board to prototype different filters to be used with the Multi-channel Time Interval Counter.

The VFC is a VME carrier for two VITA 57 (FMC) mezzanines. For more details please refer to the wiki pages. Obsolete project. Replaced by VFC-HD.

FMC VHDCI is a simple breakout board that connects signals from an Low Pin Count (LPC) FMC connector to an VHDCI connector. The signals are not buffered. More info at the Wiki page