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The Electronics Design project gives helpful entry points for electronics engineers. VHDL coding, design reviews, components, production, assembly and testing are some subjects. More info at the Wiki page
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E-bone first aims at interfacing an FPGA based PCIe Endpoint core to a collection of other cores. The E-bone release contains a number of general purpose cores within that scope. E-bone specifications cater for both a Control Interconnect and a Fast Transmitter. The Control Interconnect defines a 32 bit wide interconnection between a number of masters and slaves. The Fast Transmitter is a one way path (up to 256 bit wide) aiming at dumping large data sets to the root complex. E-bone is nevertheless not restricted to PCIe interfacing and may be used for developing sub-systems in others environments.
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A radiation-tolerant digital I/O module with sixteen 24 Volt optically isolated inputs and outputs. 3U module with AirMax backplane connector for DIOT crate.
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DDR3 controller with two pipelined Wishbone slave ports. It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen.
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Projects / DCES-DTRHF-SER1CH-v1
GNU General Public License v3.0 onlyData centre environmental sensor - Dust, Temperature, Relative Humidity, Fan - Serial 1 channel - version 1. An environmental sensor for Data Centers that continuously measures airborne particle density in high airflow as well as temperature and relative humidity. It can control its fan speed if needed (PWM controlled fans) and monitors FAN rotational speed (tachometer equipped fans) for precise airflow control and monitoring. It is close to maintenance free and can be integrated in compact enclosures (for example tape drive tray or even an ATX PSU case...). More info at the Wiki page
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A cute-wr is a compact WR-node implementation with minimum components required. The initial design is derived from SPEC, but would work in an opposite manner as a FMC wr-nic, providing 2 DIO channels, external CLK input, EEPROM, JTAG, RS232, and expandable IOs through FMC connector. The gateware and software of cute-wr would also keep maximum compatibility with SPEC. Project is obsolete. See cute-wr-dp for a similar board.
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Projects / Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
MIT LicenseThe CUTE-WR-DP is the enhanced version of CUTE-WR with dual WR ports. You can use it as the normal WR node with one SFP port. CUTE-WR-DP can work in chain to support cascade topology. In future, CUTE-WR-DP could support dualport redundancy function for high reliable application. More info at the Wiki page
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The CTR FMC is an FMC card that can be used, in conjunction with the Simple PCIe FMC carrier (SPEC), to design a General Machine Timing (GMT) Receiver. More info at the Wiki page
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CROME FMC carrier board (SPEC -based) for the CROME project. More info at the Wiki page
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CompactRIO module with White Rabbit functionality. LabVIEW support, front-panel connector with 10 I/O lines.
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Cosmic Pi - a low cost distributed cosmic ray detector, based on Raspberry Pi. It makes the detection and analysis of cosmic rays accessible to students, educators and ordinary people. It uses a specially designed detector combined with the low cost hardware of the Raspberry Pi computer for data storage and online analysis. More info at the Wiki page
If you're looking for the V1 prototype schematics and PCB layouts you can find them here Our more recent hardware (V1.5 and V2) plus all code is stored on github and can be found here To learn about the project, have a look at our blog
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The project hardware is currently being developed in EagleCAD but we'll be moving to KiCAD fairly soon.
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A level conversion board in VME64x double-height form factor between TTL and RS485. Direction and levels are configurable. The project uses a Rear Transition Module for connectivity and a Front module with the active conversion and diagnostics electronics. More info at the Wiki page
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A three-channel TTL to NIM (Nuclear Instrumentation Module) level conversion board in VME form factor. More info at the Wiki page
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A level conversion board between TTL and 24V blocking levels in VME64x form factor. The project uses a rear transition module for connectivity and a front module with the active conversion and diagnostics electronics. More info at the Wiki page
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Production and functional tests for Conv TTL Blocking. More info at the Wiki page
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Hardware design of Conv TTL Blocking. Includes schematics, PCB layout and manufacturing files. More info at the Wiki page
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Gateware (VHDL) for the level conversion board Conv TTL Blocking in VME64x form factor between TTL and blocking levels. More info at the Wiki page
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A VME rear transition module providing fibre-optic and electrical (RS485) inputs and outputs. Uses the CONV-TTL-RS485 as front-module. More info at the Wiki page
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