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We have designed an FPGA Mezzanine card (standard FMC/Vita 57) for high-channel-count electrophysiology, with 128 channels (potentially up to 512), based upon Intan Tech's RHA2132 (2 uV rms input-referred noise), sampled at 25kHz 18bit by AD7982. We are basing our design on the reference design provided by Reid Harrison of Intan Tech for their 16-channel evaluation board. The expected cost of the device should be under 5000$.

In order to have an integrated solution we intend to have as default carrier the Opal Kelly Shuttle LX1, an inexpensive USB FMC carrier with an excellent USB controller. The integrated solution will be completed with software on the PC side to grab to disk continuously and/or display in some fashion all 128 channels.

Our status: We have an alpha card. It has passed most tests---we can grab from any channel at 1MS/s. We have an alpha microcode: it grabs from any channel and stores on the PC.

Our current team: Marcelo Magnasco (Rockefeller University, New York), design. Andres Cicuttin (ICTP, Trieste), schematics + fpga Maria Liz Crespo (ICTP, Trieste), fpga Sanjee Abeytunge (MSKCC, New York) layout Nicholas Joseph (RU) Macintosh drivers

A project to host all software and hardware developments related to testing the White Rabbit switch.

A White Rabbit compliant Network Interface Card (NIC) based on the SPEC and the DIO FMC. This project hosts the HDL and associated software to configure the SPEC so it behaves as a NIC under the Linux OS.

Software for Beam Position Monitor, including digital signal processing chains, data acquisition engines, ADC and analog front-end peripherals control/monitoring, timing and control system interface.

The FMC bus abstraction implements a Linux kernel bus named fmc. This allows to deal with FMC mezzanines in a carrier-independent way

Software support for the SVEC board, including kernel and user-space Linux code.

A software suite written in Python to help with production tests of PCBs. AKA PTS.

%(red)This pts-base project is used to re-organise the current pts project In the future this project will replace the existing pts project.

More info at the Wiki page

A fully operational stand-alone FMC Delay card based White-Rabbit node which can be initialized and perform periodic calibrations without requiring to be plugged on a PC, reducing final system cost, size and power consumption. More info at the Wiki page

Gateware for Beam Position Monitor, including digital signal processing chains, data acquisition engines, ADC and analog front-end peripherals control/monitoring, timing and control system interface.

Gateware (HDL design) for MasterFIP.

Production and functional tests for the MasterFIP.

Common gateware for the different level conversion circuits.

EPICS support for Wishbone peripherals: This project consist of a Generic EPICS IOC AsynDriver to support wishbone peripheral. It include the following features:

Driver for X1052, Gennum, Etherbone WB master. Direct access to any register in the wishbone bus Auto-generation of EPICS Database file using wbgen2 Automatic real number convertion (2 complements, fixed point, signess) using .wb file Support for WR Core and other internal bus protocols (i2c, spi, etc.)

More info at the Wiki page

A VHDL core for a PCI slave. The other side behaves like a Wishbone master.

More info at the Wiki page

SDB (Self-describing Bus) allows to enumerate the cores that are live in the current FPGA binary, either from the host computer or from the internal soft-core CPU in the FPGA itself. The project provides the software support and the specification. More info at the Wiki page

This library provides a generic API for ADC devices, so that applications can use this API to access any of the supported ADC boards. Currently the library supports the following boards:

fmc-adc-100m14b14cha

For testing and debugging purpose it supports also a couple of virtual boards that you can use to start the development of your application.

More info at the Wiki page

Mock Turtle is an HDL core of a generic control system node, based on a deterministic multicore CPU architecture. Mock Turtle can use White Rabbit as the means of communication and synchronization in a distributed system. More info at the Wiki page

The uRV (Micro RISC-V) core is a small-sized implementation of a 32-bit RISC-V core, targeted specifically at FPGAs. More info at the Wiki page

Production and functional tests for fmc-dac-600m-12b-1cha-dds

Data centre environmental sensor - Dust, Temperature, Relative Humidity, Fan - Serial 1 channel - version 1. An environmental sensor for Data Centers that continuously measures airborne particle density in high airflow as well as temperature and relative humidity. It can control its fan speed if needed (PWM controlled fans) and monitors FAN rotational speed (tachometer equipped fans) for precise airflow control and monitoring. It is close to maintenance free and can be integrated in compact enclosures (for example tape drive tray or even an ATX PSU case...). More info at the Wiki page