Explore projects

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

BabyWR is a general purpose small pluggable WR node in a M.2 form-factor. More info at the Wiki page

Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

A fine delay generator in FMC LPC format with 1 input and 2 outputs. The resolution is 1 ns. Optimized for high frequency pulse repetition rates synchronized to an external clock. More info at the Wiki page

Active 32/64 channels 19" patch panel for FPGA boards, with robust 5V TTL I/Os, configurable through I²C and USB-C. More info at the Wiki page

White Rabbit Trigger Distribution project. More info at the Wiki page

The VFC is a VME carrier for two VITA 57 (FMC) mezzanines. For more details please refer to the wiki pages. Obsolete project. Replaced by VFC-HD.

wbgen2 is a tool for generating VHDL/Verilog cores which implement Wishbone bus slaves with certain registers, memory blocks, FIFOs and interrupts. The input is a C-like syntax file with an abstract description of what do we want to have in the slave. As a result, we get:

- Automatically allocated memory layout

- VHDL/Verilog code for the slave module

- C header files for driver development - Nice HTML documentation

Read the wbgen2-Documentation Get the latest version binaries https://www.ohwr.org/attachments/5659/wbgen2-bin.tar.bz2

A VHDL core for a VME64x slave. The other side behaves like a Wishbone master.

More info at the Wiki page

A bridge between the local bus of the Gennum GN4124 (PCIe to local bus bridge) and Wishbone.

A fine delay generator in FMC format with 1 input and 4 outputs. The resolution is 1 ns. Commercially available. More info at the Wiki page

Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

A Time to Digital Converter core for Spartan 6 FPGAs.

A level conversion board between TTL and 24V blocking levels in VME64x form factor. The project uses a rear transition module for connectivity and a front module with the active conversion and diagnostics electronics. More info at the Wiki page

A project to host all software and hardware developments related to testing the White Rabbit switch.

A White Rabbit compliant Network Interface Card (NIC) based on the SPEC and the DIO FMC. This project hosts the HDL and associated software to configure the SPEC so it behaves as a NIC under the Linux OS.

The AsyncArt Project is comprised by a set of Open-Source HDL libraries and examples targeted to the efficient implementation of Globally Asynchronous, Locally Synchronous (GALS) design architectures over Commercial-Off-The-Shelf FPGA devices.

Software for Beam Position Monitor, including digital signal processing chains, data acquisition engines, ADC and analog front-end peripherals control/monitoring, timing and control system interface.

The FMC bus abstraction implements a Linux kernel bus named fmc. This allows to deal with FMC mezzanines in a carrier-independent way