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VHDL core for absolute position encoders (SSI, BISS, ENDAT).
More info at the Wiki pageUpdated -
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Control of instrumentation over a White Rabbit network. Define and implement a standardized communication protocol for instrumentation over a White Rabbit network (precise synchronization and timestamping; remote control and test sequence programming; message exchanging and event distribution).
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LIBSFP is a software library that contains generic functions to access SFP devices via I2C.
More info can be found on this wiki page.
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Board to prototype different filters to be used with the Multi-channel Time Interval Counter.
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Software to support the PandABox is common between all platforms using the PandABlocks framework and is developed on Github:
PandABlocks-rootfs: Github repository for building onboard rootfs from source PandABlocks-server: Github repository for onboard TCP server PandABlocks-webserver: Github repository for onboard webserver PandABlocks-client: Github repository for Python client side tools ADPandABlocks: Github repository for EPICS areaDetector driver
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Projects / LHC Instability Trigger Distribution LIST
GNU General Public License v3.0 onlyLIST is a trigger distribution system based on White Rabbit. It can receive a trigger from a “cloud” of devices and distribute it to all relevant devices to for example freeze their acquisition buffers. The latency between reception and transmission of a trigger is done with a low and notably fixed latency, with an accuracy of better than 1 ns. The hardware of the LIST nodes is based on the SVEC FMC carrier equipped with a FMC TDC mezzanine and a Fine Delay mezzanine. More info at the Wiki page
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Distribution of clock signals over a White Rabbit network. It uses an PLL with a numerically controlled (DDS) oscillator to extract the characteristics of a signal that in turn are distributed over a White Rabbit network to receiving nodes with a DAC that regenerate exactly the same signal in phase. More info at the Wiki page
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FmcAdc200k16b11cha is an 11 channel 200kSPS 16 bit ADC card in FMC (FPGA Mezzanine Card) standard. The input voltage range is settable to /-10V or/-5V. The input impedance is 1MOhm.
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The GSI Timing Starter Kit is a functional snapshot of the eventual FAIR timing system, which is under active development. It demonstrates real-time coordination of two front-end equipment controllers. The product consists of a data master (Linux PC) which coordinates events, a timing master which synchronizes clocks (White Rabbit switch), and two front-end equipment controllers (either SPECv4 or SCUv2).
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Projects / FMC DEL 1ns 4cha - stand-alone application
GNU General Public License v3.0 onlyA fully operational stand-alone FMC Delay card based White-Rabbit node which can be initialized and perform periodic calibrations without requiring to be plugged on a PC, reducing final system cost, size and power consumption. More info at the Wiki page
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Radiation tolerant projects. Projects specifically designed for radiation tolerance will be sub-projects of this umbrella project.
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PandA Motion Project is a collaboration between SOLEIL and DIAMOND to upgrade their “Position and Acquisition” processing platform. PandA will provide a common encoder processing platform based on Zynq 7030 and supporting multiple encoder standards (incremental, SSI, BISS...). It will deliver synchronous triggering and data capture capabilities.
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E-bone first aims at interfacing an FPGA based PCIe Endpoint core to a collection of other cores. The E-bone release contains a number of general purpose cores within that scope. E-bone specifications cater for both a Control Interconnect and a Fast Transmitter. The Control Interconnect defines a 32 bit wide interconnection between a number of masters and slaves. The Fast Transmitter is a one way path (up to 256 bit wide) aiming at dumping large data sets to the root complex. E-bone is nevertheless not restricted to PCIe interfacing and may be used for developing sub-systems in others environments.
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pcie-fmc-soc-vdas is a PCIe carrier for a high pin count FPGA Mezzanine Card (VITA 57). The main component is a SOC chip used in cellular base stations that can do advanced processing. More info at the Wiki page
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The CTR FMC is an FMC card that can be used, in conjunction with the Simple PCIe FMC carrier (SPEC), to design a General Machine Timing (GMT) Receiver. More info at the Wiki page
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FmcDIO16chTTLa is a 2x 8-bit port digital IO card in FMC form-factor. Each 8-bit port can be configured individually as input or output. IOs are TTL compatible. Additional test features can be mounted on the PCB. Project on hold.
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The spec-box-3n allows to use up to three SPEC FMC carriers in stand-alone mode, not plugged inside a PC. An internal 230V supply module powers the SPEC boards. The box contains fans to cool the cards. More info at the Wiki page
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