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OpenBreath / Open Breath Lung Ventilator
Open Breath lung ventilator. It is developed to be low-cost, scalable and easily manufactured. It can be used in Pressure and Volume Control, SIMV+PS and CPAP functions. More info at the Wiki page
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Projects / 3DMASK - 3D printed mask
This open-source 3DMASK offers a FFP2-level protection with the right filter material. It can be produced by anybody in possession of a 3D printer. More info at the Wiki page.
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Tom Levens / SVEC BST Receiver
An implementation of a receiver for CERN's Beam Synchronous Timing (BST) on a SVEC.
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Projects / Microstepper
High-resolution frequency/phase-microstepper for timing laboratories. More info at the Wiki page
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Projects / DIOT Igloo2-based radiation-tolerant System Board
DI/OT Igloo2-based System Board for radiation-exposed DI/OT applications. More info at the Wiki page
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Projects / HPSEC - High Precision Slaved External Clock
High precision, ultra stable Oven Controlled Crystal Oscillator (OCXO) suitable for the Metrology purposes in a 19" format. Can be used to upgrade the performance of the SPEC7.
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Projects / FMC Projects
FMCprojects shows the FMC Mezzanine and Carrier boards that are developed in the Open Hardware Repository context. Furthermore it gives useful data helping you to design modules complying to this VITA 57.1 standard. This actually is not a hardware project, but is there to help you find your way in the FMC standard and shows you which FMC Mezzanines and Carriers are being developed in the context of the Open Hardware project.
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Projects / OHR Support
OHR project where you can get help and guidelines about OHR. It's a support project for questions/feedback and bugs. More info at the Wiki page
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Projects / OHR Meta Project
A meta project used to discuss and present information about Open Hardware and related subjects. More info at the Wiki page More info about the CERN Open Hardware licence More info about the OHR.org site support
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Projects / TDC core
A Time to Digital Converter core for Spartan 6 FPGAs.
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Projects / FMC DIO 5ch TTL a
FmcDIO5chTTLa is a 5-bit port digital IO card in FMC form-factor. Each single-bit port can be configured individually as input or output. The I/Os on LEMO 00 connectors are TTL compatible. Commercially available. More info at the Wiki page
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Projects / FMC TDC 1ns 5cha
An FPGA Mezzanine Card (FMC) with a Time to Digital Converter chip to perform one-shot sub-nanosecond time interval measurements. Commercially available. More info at the Wiki page
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Projects / fmc dac 600m 12b 1cha dds - Testing
Production and functional tests for fmc-dac-600m-12b-1cha-dds
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Projects / Compact Universal Timing Endpoint Based on White Rabbit with Dual Ports Cute-WR-DP
The CUTE-WR-DP is the enhanced version of CUTE-WR with dual WR ports. You can use it as the normal WR node with one SFP port. CUTE-WR-DP can work in chain to support cascade topology. In future, CUTE-WR-DP could support dualport redundancy function for high reliable application. More info at the Wiki page
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Projects / tr-amc
A White Rabbit Timing Receiver in AMC (Advanced Mezzanine Card, AdvancedMC) format. More info at the Wiki page
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Projects / White Rabbit low jitter
Project exploring the current limits of White Rabbit timing distribution and how to obtain the best possible jitter and Allan Deviation performance
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Projects / FMC DIO 10I 8O
FmcDIO10i8o is an I/O card in FMC form-factor. Its 10 inputs use fast differential comparators (propagation delay < 1 ns) with individual 8-bit DACs of minimum 1 MSPS output settling. The 8 outputs are TTL level. More info at the Wiki page
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Projects / tr-pmc
A White Rabbit Timing Receiver in PMC (PCI Mezzanine Card) format. More info at the Wiki page
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Projects / FPGA and ARM SoC FMC Carrier FASEC
A carrier for two low pin count FPGA Mezzanine Cards (VITA 57), analog inputs and fail-safe functionality. It has memory and clocking resources and supports the White Rabbit timing and control network. Stand-alone board for use in a 'pizza-box'. More info at the Wiki page
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