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This library provides a generic API for ADC devices, so that applications can use this API to access any of the supported ADC boards. Currently the library supports the following boards:

fmc-adc-100m14b14cha

For testing and debugging purpose it supports also a couple of virtual boards that you can use to start the development of your application.

More info at the Wiki page

A web based commander based on Node.JS for the HDLMake tool.

A radiation tolerant flashing beacon design, based on earlier GaN driver developments for radiation tolerant lighting. Currently in the prototype stage with no radiation testing yet performed.

EDM is a Embedded Design Module standard under the Creative Commons license targeting on embedded applications and controllers which are being actively developed by many embedded companies. See http://www.edm-standard.org. This projects holds all EDM compatible boards.

The uRV (Micro RISC-V) core is a small-sized implementation of a 32-bit RISC-V core, targeted specifically at FPGAs. More info at the Wiki page

Legacy-VME64x core implements a legacy VME (VMEbus IEEE-1014) and VME64x (based on the vme64x-core) slave.

The core offers for SoC interconnection:

Master WB interconnection and Slave WB for MSI IRQ.

The core also provides a universal layer abstraction for common hardware components in VME design (e.g VME buffers). It allows for geographical and hardware switch addressing. More info at the Wiki page

DI/OT Igloo2-based System Board for radiation-exposed DI/OT applications. More info at the Wiki page

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.

More info at the Wiki page

Firmware(gateware) for FPGA on AIDA-Innova TLU ( AIDAInnova_TLU )

This project contains all the HDL gateware necessary for the FPGA of the WR switch.

The CTR FMC is an FMC card that can be used, in conjunction with the Simple PCIe FMC carrier (SPEC), to design a General Machine Timing (GMT) Receiver. More info at the Wiki page

A transparent Wishbone bridge between two FPGAs using high-speed serial links. This project is on hold.* More info at the Wiki page

FMC High Voltage supply capable of delivering positive or negative voltage (selectable by components assembly) with voltage and current monitoring. Features FMC LPC, 0.../- 6kV, up to 4W, Selectable range (/- 750V, /- 1.5kV,/- 3kV, /- 4.5kV,/- 6kV), Voltage and current measurement with hardware over-current protection, SHV output.

LIST is a trigger distribution system based on White Rabbit. It can receive a trigger from a “cloud” of devices and distribute it to all relevant devices to for example freeze their acquisition buffers. The latency between reception and transmission of a trigger is done with a low and notably fixed latency, with an accuracy of better than 1 ns. The hardware of the LIST nodes is based on the SVEC FMC carrier equipped with a FMC TDC mezzanine and a Fine Delay mezzanine. More info at the Wiki page

The uTCA RTM 8 SFP is module equipped with 8 SFP cages and a clock distribution network. It is compatible with AFC and future projects such as Kintex-based AFC and WR MCH. The module is compliant with DESY RTM class D1.3

A Trigger/Timing Logic Unit designed for use with High Energy Physics beam-tests. Provides a simple and flexible interface for fast timing and triggering signals at the AIDA pixel sensor beam-telescope. Connects to a FPGA carrier card via a FMC connector.

( N.B. Use the sub-project Git repositories, not the top level repository )

A level conversion board between TTL and 24V blocking levels in VME64x form factor. The project uses a rear transition module for connectivity and a front module with the active conversion and diagnostics electronics. More info at the Wiki page

The Face Shield, made only for COVID-19 protection, can be worn directly or can be put on safety helmets. The FaceShield is developed under the CERN against COVID-19 program. More info at the Wiki page