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This project contains all the HDL gateware necessary for the FPGA of the WR switch.

19"-rack mounted module which connects 20 single-ended K-type or N-type thermocouple channels with zQSFP+ to samb-temp-thcpl-fmc. Used in SAMbuCa project. More info at the Wiki page

A low cost, low complexity FMC carrier based on Xilinx Artix-7

A distributed oscilloscope based on the White Rabbit network. More info at the Wiki page

The FmcAdc500M14b4cha is a 4-channel 500 MSPS 14 bit ADC card in FMC (FPGA Mezzanine Card, VITA 57.1) format using a High Pin-Count (HPC) connector.

More info at the Wiki Page

Production and functional tests for the MasterFIP.

A VHDL core for a VME64x slave. The other side behaves like a Wishbone master.

DDR3 controller with two pipelined Wishbone slave ports. It is based on the Spartan6 hardware core and a management core generated by Xilinx CoreGen.

CROME FMC carrier board (SPEC -based) for the CROME project. More info at the Wiki page

fmc-adc-subsamp125m14b4cha is a 4 channel 125MSPS 14 bit ADC low pin count FPGA Mezzanine Card (VITA 57). It is designed for undersampling signals with a frequency higher than 125 MHz. More info at the Wiki page

A White Rabbit Timing Receiver in PCIe (PCI Express) format. More info at the Wiki page

Stand Alone Carrier with 18 FMC LPC slots based on Spartan FPGAs, mini-ITX board and ATX supply. More info at the Wiki page

The aim of the board is to improve the performance of the WR Switch using an external PLL and a new VCTCXO. More info at the Wiki page

Gateware (HDL design) for Conv TTL RS485

Production and functional tests for FMC ADC 100M 14b 4cha.

Open design and implementation of a low-cost ventilator for COVID-19 patients. More info at the Wiki page

A simple VME64x carrier for two high pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Follow-up of SVEC.

Projects using the USB bus as main bus

A front-end PCI board with LEMO connectors to interface with the GPIO interconnect pins of the SIS1160 FMC carrier. More info at the Wiki page

Projects not directly identifiable with PCB or HDL core developments.